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| author | Stan Cox <coxs@gnu.org> | 1997-03-27 22:23:58 +0000 |
|---|---|---|
| committer | Stan Cox <coxs@gnu.org> | 1997-03-27 22:23:58 +0000 |
| commit | 3bc97c561621afe775c96497c11da4fac7229060 (patch) | |
| tree | 952c8f5947af62826173941011daa96c5be98242 | |
| parent | d5c65c96b894c2d8f89d5eb34257880e6059f453 (diff) | |
| download | gcc-3bc97c561621afe775c96497c11da4fac7229060.zip gcc-3bc97c561621afe775c96497c11da4fac7229060.tar.gz gcc-3bc97c561621afe775c96497c11da4fac7229060.tar.bz2 | |
(zero_extendhisi2+[12]): use true_regnum instead of REGN
From-SVN: r13808
| -rw-r--r-- | gcc/config/i386/i386.md | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6890ef0..b5ef6a7 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1816,7 +1816,7 @@ (const_int 0)) (set (strict_low_part (match_dup 2)) (match_dup 1))] - "operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));") + "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));") (define_split @@ -1828,7 +1828,7 @@ (set (match_dup 0) (and:SI (match_dup 0) (const_int 65535)))] - "operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));") + "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));") (define_insn "zero_extendqihi2" [(set (match_operand:HI 0 "register_operand" "=q,&q,?r") @@ -1989,18 +1989,14 @@ (define_split [(set (match_operand:SI 0 "register_operand" "") (zero_extend:SI (match_operand:QI 1 "register_operand" "")))] - "reload_completed && TARGET_ZERO_EXTEND_WITH_AND" + "reload_completed && TARGET_ZERO_EXTEND_WITH_AND + && ! reg_overlap_mentioned_p (operands[0], operands[1])" [(set (match_dup 0) (match_dup 2)) (set (match_dup 0) (and:SI (match_dup 0) (const_int 255)))] - "if (GET_CODE (operands[1]) == SUBREG && SUBREG_WORD (operands[1]) == 0) - operands[1] = SUBREG_REG (operands[1]); - if (GET_CODE (operands[1]) != REG - || REGNO (operands[0]) == REGNO (operands[1])) - FAIL; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[1]));") + "operands[2] = gen_rtx (REG, SImode, true_regnum (operands[1]));") (define_insn "zero_extendsidi2" [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?m") |