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author | Richard Earnshaw <rearnsha@arm.com> | 2005-08-16 09:27:52 +0000 |
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committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2005-08-16 09:27:52 +0000 |
commit | 39c39be09e9537d1d642cc49a48d2a2d76a7d960 (patch) | |
tree | e1d50af9549add88a10df8ff296528d9e76f2c7d | |
parent | 7c83bbb10900a9265c7339ab6dfed58143e40134 (diff) | |
download | gcc-39c39be09e9537d1d642cc49a48d2a2d76a7d960.zip gcc-39c39be09e9537d1d642cc49a48d2a2d76a7d960.tar.gz gcc-39c39be09e9537d1d642cc49a48d2a2d76a7d960.tar.bz2 |
re PR target/23355 (size optimizer did not eliminateing useless Push and pop instructions at ARM/Thumb machine)
PR target/23355
* arm.c (thumb_compute_save_reg_mask): Use similar logic to
arm_compure_save_reg0_reg12_mask to determine when the PIC register
must be saved.
From-SVN: r103151
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/arm/arm.c | 9 |
2 files changed, 11 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 93257ee..24be811 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2005-08-15 Richard Earnshaw <richard.earnshaw@arm.com> + + PR target/23355 + * arm.c (thumb_compute_save_reg_mask): Use similar logic to + arm_compure_save_reg0_reg12_mask to determine when the PIC register + must be saved. + 2005-08-15 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> PR middle-end/23369 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index d391a52..76f9091 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -8935,11 +8935,10 @@ thumb_compute_save_reg_mask (void) if (regs_ever_live[reg] && !call_used_regs[reg]) mask |= 1 << reg; - if (flag_pic && !TARGET_SINGLE_PIC_BASE) - mask |= (1 << PIC_OFFSET_TABLE_REGNUM); - - if (TARGET_SINGLE_PIC_BASE) - mask &= ~(1 << arm_pic_register); + if (flag_pic + && !TARGET_SINGLE_PIC_BASE + && current_function_uses_pic_offset_table) + mask |= 1 << PIC_OFFSET_TABLE_REGNUM; /* See if we might need r11 for calls to _interwork_r11_call_via_rN(). */ if (!frame_pointer_needed && CALLER_INTERWORKING_SLOT_SIZE > 0) |