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| author | Andrew Stubbs <ams@codesourcery.com> | 2023-04-03 12:16:11 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2023-04-04 10:47:48 +0100 |
| commit | 34574064412eca1af8494d240e3627c02ecaf823 (patch) | |
| tree | 1eaab437292c7be5d978432a1d8fa6cb43762f80 | |
| parent | 840354060e23ff28d325af2b8422233ce14f40f8 (diff) | |
| download | gcc-34574064412eca1af8494d240e3627c02ecaf823.zip gcc-34574064412eca1af8494d240e3627c02ecaf823.tar.gz gcc-34574064412eca1af8494d240e3627c02ecaf823.tar.bz2 | |
amdgcn: Add 64-bit vector not
gcc/ChangeLog:
* config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 334b6b0..e3d6d65 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -2732,6 +2732,23 @@ DONE; }) +(define_insn_and_split "one_cmpl<mode>2<exec>" + [(set (match_operand:V_DI 0 "register_operand" "= v") + (not:V_DI + (match_operand:V_DI 1 "gcn_alu_operand" "vSvDB")))] + "" + "#" + "reload_completed" + [(set (match_dup 3) (not:<VnSI> (match_dup 5))) + (set (match_dup 4) (not:<VnSI> (match_dup 6)))] + { + operands[3] = gcn_operand_part (<VnDI>mode, operands[0], 0); + operands[4] = gcn_operand_part (<VnDI>mode, operands[0], 1); + operands[5] = gcn_operand_part (<VnDI>mode, operands[1], 0); + operands[6] = gcn_operand_part (<VnDI>mode, operands[1], 1); + } + [(set_attr "type" "mult")]) + ;; }}} ;; {{{ FP binops - special cases |