diff options
author | Toma Tabacu <toma.tabacu@imgtec.com> | 2017-03-03 13:23:53 +0000 |
---|---|---|
committer | Toma Tabacu <tomtab@gcc.gnu.org> | 2017-03-03 13:23:53 +0000 |
commit | 31dcc385686f963dd1c08de17b9838ff774b6224 (patch) | |
tree | d0be7e182ea8603a67f9649d5d8d70d0624e4982 | |
parent | 1c98e10bc9cb6f8da44a53e660209236a9bf2654 (diff) | |
download | gcc-31dcc385686f963dd1c08de17b9838ff774b6224.zip gcc-31dcc385686f963dd1c08de17b9838ff774b6224.tar.gz gcc-31dcc385686f963dd1c08de17b9838ff774b6224.tar.bz2 |
MIPS: Fix register mode checking for n64 in pr68273.c.
gcc/testsuite/
* gcc.target/mips/pr68273.c (dg-final): Match SImode registers only for
ilp32 targets and match DImode registers for lp64 targets.
From-SVN: r245874
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/mips/pr68273.c | 7 |
2 files changed, 10 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5084284..a0e4830 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-03-03 Toma Tabacu <toma.tabacu@imgtec.com> + + * gcc.target/mips/pr68273.c (dg-final): Match SImode registers only for + ilp32 targets and match DImode registers for lp64 targets. + 2017-03-03 Uros Bizjak <ubizjak@gmail.com> * g++.dg/pr71624.C: Disable for x32. diff --git a/gcc/testsuite/gcc.target/mips/pr68273.c b/gcc/testsuite/gcc.target/mips/pr68273.c index cbe81e1..ce8ca93 100644 --- a/gcc/testsuite/gcc.target/mips/pr68273.c +++ b/gcc/testsuite/gcc.target/mips/pr68273.c @@ -75,5 +75,8 @@ op (Node q) } -/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 5 \\\$5\\\)" 2 "expand" } } */ -/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 6 \\\$6\\\)" 1 "expand" } } */ +/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 5 \\\$5\\\)" 2 "expand" { target { ilp32 } } } } */ +/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 6 \\\$6\\\)" 1 "expand" { target { ilp32 } } } } */ + +/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:DI 5 \\\$5\\\)" 2 "expand" { target { lp64 } } } } */ +/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:DI 6 \\\$6\\\)" 1 "expand" { target { lp64 } } } } */ |