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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-09-15 09:19:14 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-09-15 09:19:14 +0100 |
commit | 2d38f45bcca62ca0c7afef4b579f82c5c2a01610 (patch) | |
tree | 67a53cacbed82fe5b54e5e8a5dcae818228ebb77 | |
parent | 227b18f5d7616d6d34ac44836a8679de9b43c857 (diff) | |
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aarch64: Fix loose ldpstp check [PR111411]
aarch64_operands_ok_for_ldpstp contained the code:
/* One of the memory accesses must be a mempair operand.
If it is not the first one, they need to be swapped by the
peephole. */
if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1))
&& !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2)))
return false;
But the requirement isn't just that one of the accesses must be a
valid mempair operand. It's that the lower access must be, since
that's the access that will be used for the instruction operand.
gcc/
PR target/111411
* config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
the lower memory access to a mem-pair operand.
gcc/testsuite/
PR target/111411
* gcc.dg/rtl/aarch64/pr111411.c: New test.
-rw-r--r-- | gcc/config/aarch64/aarch64.cc | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c | 57 |
2 files changed, 60 insertions, 5 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 0962fc4..7bb1161 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -26503,11 +26503,9 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load, gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)), GET_MODE_SIZE (GET_MODE (mem_2)))); - /* One of the memory accesses must be a mempair operand. - If it is not the first one, they need to be swapped by the - peephole. */ - if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1)) - && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2))) + /* The lower memory access must be a mem-pair operand. */ + rtx lower_mem = reversed ? mem_2 : mem_1; + if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem))) return false; if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1))) diff --git a/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c b/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c new file mode 100644 index 0000000..ad07e9c --- /dev/null +++ b/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c @@ -0,0 +1,57 @@ +/* { dg-do compile { target aarch64*-*-* } } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O -fdisable-rtl-postreload -fpeephole2 -fno-schedule-fusion" } */ + +extern int data[]; + +void __RTL (startwith ("ira")) foo (void *ptr) +{ + (function "foo" + (param "ptr" + (DECL_RTL (reg/v:DI <0> [ ptr ])) + (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ])) + ) ;; param "ptr" + (insn-chain + (block 2 + (edge-from entry (flags "FALLTHRU")) + (cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK) + (insn 4 (set (reg:DI <0>) (reg:DI x0))) + (insn 5 (set (reg:DI <1>) + (plus:DI (reg:DI <0>) (const_int 768)))) + (insn 6 (set (mem:SI (plus:DI (reg:DI <0>) + (const_int 508)) [1 &data+508 S4 A4]) + (const_int 0))) + (insn 7 (set (mem:SI (plus:DI (reg:DI <1>) + (const_int -256)) [1 &data+512 S4 A4]) + (const_int 0))) + (edge-to exit (flags "FALLTHRU")) + ) ;; block 2 + ) ;; insn-chain + ) ;; function +} + +void __RTL (startwith ("ira")) bar (void *ptr) +{ + (function "bar" + (param "ptr" + (DECL_RTL (reg/v:DI <0> [ ptr ])) + (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ])) + ) ;; param "ptr" + (insn-chain + (block 2 + (edge-from entry (flags "FALLTHRU")) + (cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK) + (insn 4 (set (reg:DI <0>) (reg:DI x0))) + (insn 5 (set (reg:DI <1>) + (plus:DI (reg:DI <0>) (const_int 768)))) + (insn 6 (set (mem:SI (plus:DI (reg:DI <1>) + (const_int -256)) [1 &data+512 S4 A4]) + (const_int 0))) + (insn 7 (set (mem:SI (plus:DI (reg:DI <0>) + (const_int 508)) [1 &data+508 S4 A4]) + (const_int 0))) + (edge-to exit (flags "FALLTHRU")) + ) ;; block 2 + ) ;; insn-chain + ) ;; function +} |