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| author | Andreas Krebbel <krebbel@linux.ibm.com> | 2023-01-11 11:17:42 +0100 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.ibm.com> | 2023-01-11 11:18:08 +0100 |
| commit | 2ce074a7f858a1cd30ff68ec636dad9be218e04b (patch) | |
| tree | 2c74bd623b9fecd2aa6f133f16914f138fb68e57 | |
| parent | 0986c351aa8a9f08b3cb614baec13564dd62c114 (diff) | |
| download | gcc-2ce074a7f858a1cd30ff68ec636dad9be218e04b.zip gcc-2ce074a7f858a1cd30ff68ec636dad9be218e04b.tar.gz gcc-2ce074a7f858a1cd30ff68ec636dad9be218e04b.tar.bz2 | |
IBM zSystems: Use NAND instruction to implement bit not
gcc/ChangeLog:
* config/s390/s390.md (*not<mode>): New pattern.
gcc/testsuite/ChangeLog:
* gcc.target/s390/not.c: New test.
| -rw-r--r-- | gcc/config/s390/s390.md | 8 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/s390/not.c | 11 |
2 files changed, 19 insertions, 0 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 0e56fba..4828aa0 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -8302,6 +8302,14 @@ "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2" [(set_attr "op_type" "RRF")]) +; Use NAND for bit inversion +(define_insn "*not<mode>" + [(set (match_operand:GPR 0 "register_operand" "=d") + (not:GPR (match_operand:GPR 1 "register_operand" "d"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_Z15" + "nn<GPR:g>rk\t%0,%1,%1" + [(set_attr "op_type" "RRF")]) ; ; Block inclusive or (OC) patterns. diff --git a/gcc/testsuite/gcc.target/s390/not.c b/gcc/testsuite/gcc.target/s390/not.c new file mode 100644 index 0000000..dae95f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/not.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z15 -mzarch" } */ + +unsigned long +foo (unsigned long a) +{ + return ~a; +} + +/* { dg-final { scan-assembler-times "\tnngrk\t" 1 { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times "\tnnrk\t" 1 { target { ! lp64 } } } } */ |