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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2014-10-14 08:33:01 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2014-10-14 08:33:01 +0000 |
| commit | 2ac7a566e85dfe93e57db70410a7f6045387efa1 (patch) | |
| tree | a912ea1f0e49ba06582a6baf6bc7f6d66df5b11f | |
| parent | d281ef4281b3948df177898bccd54cd267f522a4 (diff) | |
| download | gcc-2ac7a566e85dfe93e57db70410a7f6045387efa1.zip gcc-2ac7a566e85dfe93e57db70410a7f6045387efa1.tar.gz gcc-2ac7a566e85dfe93e57db70410a7f6045387efa1.tar.bz2 | |
AVX-512. 65/n. Add rest of VI1-AVX2: mul insn pattern.
gcc/
* config/i386/sse.md
(define_expand "mul<mode>3<mask_name>"): Add masking.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216182
| -rw-r--r-- | gcc/ChangeLog | 12 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 4 |
2 files changed, 14 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a3f8471..646ec01 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -8,6 +8,18 @@ Michael Zolotukhin <michael.v.zolotukhin@intel.com> * config/i386/sse.md + (define_expand "mul<mode>3<mask_name>"): Add masking. + +2014-10-14 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (define_insn "<sse2_avx2>_packsswb<mask_name>"): Add masking. (define_insn "<sse2_avx2>_packuswb<mask_name>"): Ditto. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 2673ddf..18614ca 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9125,11 +9125,11 @@ (set_attr "prefix" "orig,maybe_evex") (set_attr "mode" "TI")]) -(define_expand "mul<mode>3" +(define_expand "mul<mode>3<mask_name>" [(set (match_operand:VI1_AVX2 0 "register_operand") (mult:VI1_AVX2 (match_operand:VI1_AVX2 1 "register_operand") (match_operand:VI1_AVX2 2 "register_operand")))] - "TARGET_SSE2" + "TARGET_SSE2 && <mask_mode512bit_condition> && <mask_avx512bw_condition>" { ix86_expand_vecop_qihi (MULT, operands[0], operands[1], operands[2]); DONE; |