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| author | Richard Henderson <rth@redhat.com> | 2004-10-28 10:21:00 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2004-10-28 10:21:00 -0700 |
| commit | 283dd63338be451405f9e22f45fbb2bcae4967e3 (patch) | |
| tree | 3d7a4a08d007b3d4810f07b70b67633ca193ef2a | |
| parent | 9d80ef7c827fd5b4bc4ccfd772a10c36869aa4fd (diff) | |
| download | gcc-283dd63338be451405f9e22f45fbb2bcae4967e3.zip gcc-283dd63338be451405f9e22f45fbb2bcae4967e3.tar.gz gcc-283dd63338be451405f9e22f45fbb2bcae4967e3.tar.bz2 | |
alpha.md (movqicc_internal): Allow exactly one zero in the conditional.
* config/alpha/alpha.md (movqicc_internal): Allow exactly one
zero in the conditional.
(movhicc_internal, movsicc_internal, movdicc_internal): Likewise.
From-SVN: r89766
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5277f53..75e9cb2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2004-10-28 Richard Henderson <rth@redhat.com> + * config/alpha/alpha.md (movqicc_internal): Allow exactly one + zero in the conditional. + (movhicc_internal, movsicc_internal, movdicc_internal): Likewise. + +2004-10-28 Richard Henderson <rth@redhat.com> + * cse.c (memory_extend_rtx): Remove. (cse_main): Don't set it. (cse_insn): Use a local buffer instead. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 09967b5..ed47e9f 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -3061,7 +3061,7 @@ (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) (match_operand:QI 1 "add_operand" "rI,0,rI,0") (match_operand:QI 5 "add_operand" "0,rI,0,rI")))] - "(operands[3] == const0_rtx || operands[4] == const0_rtx)" + "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" "@ cmov%C2 %r3,%1,%0 cmov%D2 %r3,%5,%0 @@ -3077,7 +3077,7 @@ (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) (match_operand:HI 1 "add_operand" "rI,0,rI,0") (match_operand:HI 5 "add_operand" "0,rI,0,rI")))] - "(operands[3] == const0_rtx || operands[4] == const0_rtx)" + "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" "@ cmov%C2 %r3,%1,%0 cmov%D2 %r3,%5,%0 @@ -3093,7 +3093,7 @@ (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) (match_operand:SI 1 "add_operand" "rI,0,rI,0") (match_operand:SI 5 "add_operand" "0,rI,0,rI")))] - "(operands[3] == const0_rtx || operands[4] == const0_rtx)" + "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" "@ cmov%C2 %r3,%1,%0 cmov%D2 %r3,%5,%0 @@ -3109,7 +3109,7 @@ (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) (match_operand:DI 1 "add_operand" "rI,0,rI,0") (match_operand:DI 5 "add_operand" "0,rI,0,rI")))] - "(operands[3] == const0_rtx || operands[4] == const0_rtx)" + "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" "@ cmov%C2 %r3,%1,%0 cmov%D2 %r3,%5,%0 |