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| author | Lulu Cheng <chenglulu@loongson.cn> | 2023-08-31 19:11:23 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2023-09-04 09:34:46 +0800 |
| commit | 26aa5d9017104ee3a72de418e9a0a1e5c1e30313 (patch) | |
| tree | 39243c07dad638b879d47cff8fad369fb714930a | |
| parent | 124749a0f681cc20f7977708d5010174a20eb92e (diff) | |
| download | gcc-26aa5d9017104ee3a72de418e9a0a1e5c1e30313.zip gcc-26aa5d9017104ee3a72de418e9a0a1e5c1e30313.tar.gz gcc-26aa5d9017104ee3a72de418e9a0a1e5c1e30313.tar.bz2 | |
LoongArch: Optimize fixed-point and floating-point conversion operations.
Before optimization, the operation of taking fixed-point numbers from memory
and then forcing type conversion needs to be loaded into fixed-point registers
before conversion. After the optimization is completed, the fixed-point value
is directly transferred to the floating-point register for type conversion.
eg:
extern int a;
float
test(void)
{
return (float)a;
}
Assembly code before optimization:
pcalau12i $r12,%got_pc_hi20(a)
ld.d $r12,$r12,%got_pc_lo12(a)
ldptr.w $r12,$r12,0
movgr2fr.w $f0,$r12
ffint.s.w $f0,$f0
Optimized assembly code:
pcalau12i $r12,%got_pc_hi20(a)
ld.d $r12,$r12,%got_pc_lo12(a)
fld.s $f0,$r12,0
ffint.s.w $f0,$f0
gcc/ChangeLog:
* config/loongarch/loongarch.md: Allows fixed-point values to be loaded
from memory into floating-point registers.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/float-load.c: New test.
| -rw-r--r-- | gcc/config/loongarch/loongarch.md | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/loongarch/float-load.c | 11 |
2 files changed, 13 insertions, 2 deletions
diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index b37e070..2936b4c 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -1827,8 +1827,8 @@ }) (define_insn_and_split "*movsi_internal" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,w,*f,*f,*r,*m,*r,*z") - (match_operand:SI 1 "move_operand" "r,Yd,w,rJ,*r*J,*m,*f,*f,*z,*r"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,w,*f,f,*r,*m,*r,*z") + (match_operand:SI 1 "move_operand" "r,Yd,w,rJ,*r*J,m,*f,*f,*z,*r"))] "(register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode))" { return loongarch_output_move (operands[0], operands[1]); } diff --git a/gcc/testsuite/gcc.target/loongarch/float-load.c b/gcc/testsuite/gcc.target/loongarch/float-load.c new file mode 100644 index 0000000..c757a79 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/float-load.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler "fld\\.s" } } */ + +extern int a; +float +test (void) +{ + return (float)a; +} + |