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authorChristophe Lyon <christophe.lyon@arm.com>2023-01-13 12:39:49 +0000
committerChristophe Lyon <christophe.lyon@arm.com>2023-05-09 20:31:15 +0200
commit25d0235e6ecf0aab3e7f8e92c0cd02837edd01e3 (patch)
tree22ff67ab3eebfbb61d51b5f1ff3ef02a011250a1
parent83fff825edb0ccf2d21765808f94eda758a3a8cc (diff)
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arm: add smax/smin expanders for v*hf
This patch adds the missing expanders for smax/smin for v*hf modes, by using the VDQWH iterator instead of VALLW. 2022-09-08 Christophe Lyon <christophe.lyon@arm.com> gcc/ * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator. (smax<mode>3): Likewise.
-rw-r--r--gcc/config/arm/vec-common.md12
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md
index b5fc86f..6183c93 100644
--- a/gcc/config/arm/vec-common.md
+++ b/gcc/config/arm/vec-common.md
@@ -110,9 +110,9 @@
)
(define_expand "smin<mode>3"
- [(set (match_operand:VALLW 0 "s_register_operand")
- (smin:VALLW (match_operand:VALLW 1 "s_register_operand")
- (match_operand:VALLW 2 "s_register_operand")))]
+ [(set (match_operand:VDQWH 0 "s_register_operand")
+ (smin:VDQWH (match_operand:VDQWH 1 "s_register_operand")
+ (match_operand:VDQWH 2 "s_register_operand")))]
"ARM_HAVE_<MODE>_ARITH"
)
@@ -124,9 +124,9 @@
)
(define_expand "smax<mode>3"
- [(set (match_operand:VALLW 0 "s_register_operand")
- (smax:VALLW (match_operand:VALLW 1 "s_register_operand")
- (match_operand:VALLW 2 "s_register_operand")))]
+ [(set (match_operand:VDQWH 0 "s_register_operand")
+ (smax:VDQWH (match_operand:VDQWH 1 "s_register_operand")
+ (match_operand:VDQWH 2 "s_register_operand")))]
"ARM_HAVE_<MODE>_ARITH"
)