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| author | Richard Sandiford <rsandifo@redhat.com> | 2003-11-07 08:14:32 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2003-11-07 08:14:32 +0000 |
| commit | 235d0d663cb41ec10f6946352a9ad827e851334e (patch) | |
| tree | 82dd6d23a18b90b743b737b4aaddd1f08e8b0775 | |
| parent | eb622d37cfc1e4d1760aa1eba3e1ea3149f80469 (diff) | |
| download | gcc-235d0d663cb41ec10f6946352a9ad827e851334e.zip gcc-235d0d663cb41ec10f6946352a9ad827e851334e.tar.gz gcc-235d0d663cb41ec10f6946352a9ad827e851334e.tar.bz2 | |
mips.md (loadgp): Take $25 as a second operand.
* config/mips/mips.md (loadgp): Take $25 as a second operand.
* config/mips/mips.c (mips_expand_prologue): Modify accordingly.
From-SVN: r73330
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 23 |
3 files changed, 21 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f9c4da7..565c30a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2003-11-07 Richard Sandiford <rsandifo@redhat.com> + + * config/mips/mips.md (loadgp): Take $25 as a second operand. + * config/mips/mips.c (mips_expand_prologue): Modify accordingly. + 2003-11-06 Matt Austern <austern@apple.com> * c-common.c (handle_visibility_attribute): Set DECL_VISIBILITY diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 8d2c780..9b2bc2f 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -6655,11 +6655,12 @@ mips_expand_prologue (void) /* If generating n32/n64 abicalls, emit the instructions to load $gp. */ if (TARGET_ABICALLS && TARGET_NEWABI && cfun->machine->global_pointer > 0) { - rtx addr, offset; + rtx addr, offset, incoming_address; addr = XEXP (DECL_RTL (current_function_decl), 0); offset = mips_unspec_address (addr, SYMBOL_GOTOFF_LOADGP); - emit_insn (gen_loadgp (offset)); + incoming_address = gen_rtx_REG (Pmode, PIC_FUNCTION_ADDR_REGNUM); + emit_insn (gen_loadgp (offset, incoming_address)); if (!TARGET_EXPLICIT_RELOCS) emit_insn (gen_loadgp_blockage ()); } diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index ebe4beb..5a4e89e 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -5123,20 +5123,23 @@ dsrl\t%3,%3,1\n\ (set_attr "mode" "SF") (set_attr "length" "4")]) +;; Insn to initialize $gp for n32/n64 abicalls. Operand 0 is the offset +;; of _gp from the start of this function. Operand 1 is the incoming +;; function address. (define_insn_and_split "loadgp" - [(unspec_volatile [(match_operand 0 "" "")] UNSPEC_LOADGP)] + [(unspec_volatile [(match_operand 0 "" "") + (match_operand 1 "register_operand" "")] UNSPEC_LOADGP)] "TARGET_ABICALLS && TARGET_NEWABI" "#" "" - [(set (match_dup 1) (match_dup 2)) - (set (match_dup 1) (match_dup 3)) - (set (match_dup 1) (match_dup 4))] -{ - operands[1] = pic_offset_table_rtx; - operands[2] = gen_rtx_HIGH (Pmode, operands[0]); - operands[3] = gen_rtx_PLUS (Pmode, operands[1], - gen_rtx_REG (Pmode, PIC_FUNCTION_ADDR_REGNUM)); - operands[4] = gen_rtx_LO_SUM (Pmode, operands[1], operands[0]); + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 2) (match_dup 4)) + (set (match_dup 2) (match_dup 5))] +{ + operands[2] = pic_offset_table_rtx; + operands[3] = gen_rtx_HIGH (Pmode, operands[0]); + operands[4] = gen_rtx_PLUS (Pmode, operands[2], operands[1]); + operands[5] = gen_rtx_LO_SUM (Pmode, operands[2], operands[0]); } [(set_attr "length" "12")]) |