arm: improve tests and fix vcmp*

gcc/ChangeLog:

	* config/arm/mve.md (@mve_vcmp<mve_cmp_op>q_<mode>): Fix
	spacing.
	* config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m)
	(__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.

170 files changed, 4512 insertions, 421 deletions

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 073e371..684f997 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -39229,6 +39229,53 @@ extern void *__ARM_undef;
   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
 
+
+#define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+  __typeof(p1) __p1 = (p1); \
+  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+  __typeof(p1) __p1 = (p1); \
+  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+  __typeof(p1) __p1 = (p1); \
+  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+  __typeof(p1) __p1 = (p1); \
+  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+  int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+  int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
+
 #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 6d52702..3330a22 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -831,7 +831,7 @@
 		    (match_operand:MVE_2 2 "s_register_operand" "w")))
   ]
   "TARGET_HAVE_MVE"
-  "vcmp.<mve_cmp_type>%#<V_sz_elem>  <mve_cmp_op>, %q1, %q2"
+  "vcmp.<mve_cmp_type>%#<V_sz_elem>\t<mve_cmp_op>, %q1, %q2"
   [(set_attr "type" "mve_move")
 ])
 
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
index a164013..de9fe5e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmpcsq_m_n_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmpcsq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+  return vcmpcsq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
index d269ec7..04df1b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmpcsq_m_n_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmpcsq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+  return vcmpcsq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
index 52c16b3..34ebadc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmpcsq_m_n_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmpcsq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+  return vcmpcsq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
index e68afa3..bc03bf6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmpcsq_m_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmpcsq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
index 05d1b21..8e216d4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmpcsq_m_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmpcsq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
index 4c8a9d0..ac4196a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmpcsq_m_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmpcsq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
index 4124036..6038f4c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b)
 {
   return vcmpcsq_n_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b)
 {
   return vcmpcsq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.u16	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+  return vcmpcsq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
index 463c1ee..9f39aa7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b)
 {
   return vcmpcsq_n_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b)
 {
   return vcmpcsq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.u32	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+  return vcmpcsq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
index 92bc44a..0ce2cd1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b)
 {
   return vcmpcsq_n_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b)
 {
   return vcmpcsq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.u8	cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+  return vcmpcsq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
index 26c7d75..5598d06 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b)
 {
   return vcmpcsq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u16	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b)
 {
   return vcmpcsq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
index c91b0e1..99b232b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b)
 {
   return vcmpcsq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u32	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b)
 {
   return vcmpcsq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
index 51ddab9..571e571 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b)
 {
   return vcmpcsq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u8	cs, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b)
 {
   return vcmpcsq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
index 556351f..57b276a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vcmpeqq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
index 65b2f24..ab1b25e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vcmpeqq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
index 91b0ffa..c558788 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
index d66e9c8..4e9675f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
index 46b3f44..a3cae82 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vcmpeqq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
index 7d672c1..a7ce9e0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vcmpeqq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
index 912d4ad..7ba481e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
index 947c331..13c88ea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
index e215d65..dcf276d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
index ea4716c..d59d514 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+  return vcmpeqq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
index 489c6ec..1fbf385 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+  return vcmpeqq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
index e8dfce4..92758c9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_n_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+  return vcmpeqq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
index 7e4c141..1ea35ed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
index 904cfb6..a9bc973 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
index a7e1216..a9fe771 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
index 283e1fd..8269018 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
index ad1739b..512b7f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
index 595142e..01b4507 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmpeqq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
index f97209d..cf28125 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b)
 {
   return vcmpeqq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+  return vcmpeqq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
index c808432..1381717 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b)
 {
   return vcmpeqq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+  return vcmpeqq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
index 69f1f53..bd29828 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b)
 {
   return vcmpeqq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
index 06032db..2a0d84e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b)
 {
   return vcmpeqq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
index 3ebd88b..524bbe9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b)
 {
   return vcmpeqq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
index 2f6c53a..3eeaa49 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b)
 {
   return vcmpeqq_n_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.i16	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+  return vcmpeqq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
index 22fb5be..a881bb8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b)
 {
   return vcmpeqq_n_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.i32	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+  return vcmpeqq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
index 79eaeed..429b2e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b)
 {
   return vcmpeqq_n_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.i8	eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+  return vcmpeqq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
index 7951ead..92a87c0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vcmpeqq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
index 659ccb4..d3b87d5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vcmpeqq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
index 9282ec2..2b71bbf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vcmpeqq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
index 318b7aa..1830b66 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b)
 {
   return vcmpeqq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
index 88e015f..2b2a5f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b)
 {
   return vcmpeqq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
index 990a96f..9450c20 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b)
 {
   return vcmpeqq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	eq, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b)
 {
   return vcmpeqq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
index eea63a2..fd8bcab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vcmpgeq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
index 64243fe..a2d50b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vcmpgeq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
index 3588b0a..a631825 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
index 8ed1d22..b94e073 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
index d106af8..9f4903d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vcmpgeq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
index 1feef8a..679e644 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vcmpgeq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
index c0ad38f..45e26d0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
index 8974ce4..3a6cad9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
index 981aa1b..ce1ca30 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
index 587432a..51587a3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
index e460a8d..3ff0aaa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
index cde28a3..df71ee5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpgeq_m_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpgeq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
index 907fa5d..2ca1b9d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b)
 {
   return vcmpgeq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+  return vcmpgeq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
index e4d1406..3af110b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b)
 {
   return vcmpgeq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+  return vcmpgeq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
index f4aad09..3c1af8a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b)
 {
   return vcmpgeq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
index 2baa520..8b4e0f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b)
 {
   return vcmpgeq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
index 1dcffcc..c1669bc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b)
 {
   return vcmpgeq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
index 817ffb2..593c741 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vcmpgeq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
index d608b7f..9e26ea993 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vcmpgeq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
index 506e6ce..3cb2832 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vcmpgeq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	ge, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vcmpgeq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
index e2bfd7e..8835fe0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vcmpgtq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
index 1b4433f..e147088 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vcmpgtq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
index def3f90..cb9d5f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
index 41a1156..b249b83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
index 80c86f6..b375983 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vcmpgtq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
index 9b7aaad..208a285 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vcmpgtq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
index c0719d0..248e309 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
index 26df8ce..9843288 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
index f20c50d..80f1aa9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
index da97abc..9289c00 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
index ab7c218..8a3d760 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
index 13520d1..2760795 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpgtq_m_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpgtq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
index 98e152c..9f2a4be 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b)
 {
   return vcmpgtq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+  return vcmpgtq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
index 5691e2f..bbf18eb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b)
 {
   return vcmpgtq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+  return vcmpgtq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
index bc3bdba..d833cb6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b)
 {
   return vcmpgtq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
index 409a3f9..28cd51b9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b)
 {
   return vcmpgtq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
index 2624307..5a953ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b)
 {
   return vcmpgtq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
index be19e19..b9c9da4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vcmpgtq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
index 95f6c70..0f79385 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vcmpgtq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
index 8ba180d..f59dad9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vcmpgtq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	gt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vcmpgtq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
index 26e5fe3..136a2e4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmphiq_m_n_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmphiq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+  return vcmphiq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
index 51396b8..5640b97 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmphiq_m_n_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmphiq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+  return vcmphiq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
index 475f2e8..e6474e4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmphiq_m_n_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmphiq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+  return vcmphiq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
index 98ba895..38b9b90 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmphiq_m_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmphiq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
index ee561b0..97c8c1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmphiq_m_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmphiq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
index 0c5b29e..e2024cc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmphiq_m_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmphiq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
index d39b755..36107fc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b)
 {
   return vcmphiq_n_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b)
 {
   return vcmphiq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.u16	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+  return vcmphiq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
index dbedea9..d34de8f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b)
 {
   return vcmphiq_n_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b)
 {
   return vcmphiq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.u32	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+  return vcmphiq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
index 967bb20..93a05b1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b)
 {
   return vcmphiq_n_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b)
 {
   return vcmphiq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.u8	hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+  return vcmphiq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
index f939949..40e65dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b)
 {
   return vcmphiq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u16	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b)
 {
   return vcmphiq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
index becdef0..d87a418 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b)
 {
   return vcmphiq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u32	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b)
 {
   return vcmphiq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
index 933cc69..80fd2a4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b)
 {
   return vcmphiq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.u8	hi, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b)
 {
   return vcmphiq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
index c2e69a5..209d810 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vcmpleq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
index 923aee0..b92c5f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vcmpleq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
index 66a3719..e613689 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpleq_m_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
index e679b33..2304e98 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpleq_m_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
index 42049fd..a61db28 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpleq_m_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vcmpleq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
index c68bd4e..7a2cdb4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpleq_m_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vcmpleq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
index 0cdc144..69fcab1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpleq_m_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
index a955af8..617ebd6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpleq_m_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
index d9951e4..b8ee50d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpleq_m_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
index f16aff8..fcc376d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpleq_m_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
index 2c4e659..9983e89 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpleq_m_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
index 69b88cf..504e4fe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpleq_m_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpleq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
index 3fa3c5e..cfa6dbc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b)
 {
   return vcmpleq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+  return vcmpleq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
index 8349de7..c89558f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b)
 {
   return vcmpleq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+  return vcmpleq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
index 5ecae57..da73fc1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b)
 {
   return vcmpleq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
index 02320e7..0951a5c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b)
 {
   return vcmpleq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
index a0ac973..e455335 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b)
 {
   return vcmpleq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	le, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
index 2fb4acd..68500da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vcmpleq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
index 2ae998e..1966bcd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vcmpleq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
index da06b019..e9f6e47 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vcmpleq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	le, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vcmpleq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
index eab80b2..b495881 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vcmpltq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
index f17d164..752ab2b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vcmpltq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
index 93c36f3..cbaacbe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpltq_m_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
index a17f0b0..96d0e7c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpltq_m_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
index 45d0f51..1e5db53 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpltq_m_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vcmpltq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
index 16e37cc..77de40a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpltq_m_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vcmpltq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
index d0e322f..beebe65 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpltq_m_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
index 7ec7963..07260c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpltq_m_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
index 22434e8..7d1e9e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpltq_m_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
index 359c064..c0f6dfc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpltq_m_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
index 3df7e89..b6fc470 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpltq_m_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
index 1055c2b..545b7635 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpltq_m_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpltq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
index 2d55af2..401ef21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b)
 {
   return vcmpltq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+  return vcmpltq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
index 2590ca8..380f071 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b)
 {
   return vcmpltq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+  return vcmpltq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
index 169f6ad..a1d1239 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b)
 {
   return vcmpltq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
index 534047c..6332f75 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b)
 {
   return vcmpltq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
index da659f1..e0ac80c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b)
 {
   return vcmpltq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
index da4c90a..23843ad 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vcmpltq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s16	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
index 5dc218a..aeb7a6f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vcmpltq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s32	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
index ea5853c..2129b56 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vcmpltq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.s8	lt, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vcmpltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
index 8d1c609..c27ea2f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vcmpneq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
index 860bd69..609de44 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vcmpneq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
index a4e62de..98f2233 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpneq_m_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
index b18a2e5..7f6e96a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpneq_m_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
index c127b3a..71b3476 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vcmpneq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
index a8423d4..d6dea8d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vcmpneq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
index 63ee1c3..e72c9b6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
index 10f6d44..47c90e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
index 66e5d15..9d9da10 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
index ffe6ff9..ea8cf24 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+  return vcmpneq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
index 55e796a..30291dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+  return vcmpneq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
index 3c8bd16..be75376 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
@@ -1,22 +1,63 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmpneq_m_n_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+  return vcmpneq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
index d3e1ce0..60e8681 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpneq_m_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
index f5602ff..780c544 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpneq_m_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
index 84b8b16..15f6d31 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpneq_m_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
index 3c89437..300852e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmpneq_m_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
index 980cc41..227b5f0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmpneq_m_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
index 2615dcb..cfcb59f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
@@ -1,22 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmpneq_m_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vcmpt.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vcmpneq_m (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
index e9e2a9c..29e43f3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float16x8_t a, float16_t b)
 {
   return vcmpneq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+  return vcmpneq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
index eb64b17..688e77c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (float32x4_t a, float32_t b)
 {
   return vcmpneq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.f32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.f32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+  return vcmpneq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
index 14689242..2afc34d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16_t b)
 {
   return vcmpneq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
index 53418ff..6c32316 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32_t b)
 {
   return vcmpneq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
index fa405c2..5483d6dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8_t b)
 {
   return vcmpneq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
index cc8540b..d8edfb0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16_t b)
 {
   return vcmpneq_n_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.i16	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+  return vcmpneq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
index 07c9b1a..2b7a6b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32_t b)
 {
   return vcmpneq_n_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.i32	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+  return vcmpneq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
index eac5e96..2dab43a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
@@ -1,21 +1,51 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8_t b)
 {
   return vcmpneq_n_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/*
+**foo2:
+**	...
+**	vcmp.i8	ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+  return vcmpneq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
index 6b04ce7..d57b607 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vcmpneq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
index cfb98d7..e02171f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vcmpneq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
index ae69be4..0abef8c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vcmpneq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
index 51059f2..7144f3e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint16x8_t a, uint16x8_t b)
 {
   return vcmpneq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i16	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint16x8_t a, uint16x8_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
index 42e4a3f..a31134f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint32x4_t a, uint32x4_t b)
 {
   return vcmpneq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i32	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint32x4_t a, uint32x4_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
index addacc1..2801c8e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
@@ -1,21 +1,37 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo (uint8x16_t a, uint8x16_t b)
 {
   return vcmpneq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vcmp.i8	ne, q[0-9]+, q[0-9]+(?:	@.*|)
+**	...
+**	vmrs	(?:ip|fp|r[0-9]+), p0(?:	@.*|)
+**	...
+*/
 mve_pred16_t
 foo1 (uint8x16_t a, uint8x16_t b)
 {
   return vcmpneq (a, b);
 }
 
-/* { dg-final { scan-assembler "vcmp.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file