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| author | Jeff Law <jlaw@ventanamicro.com> | 2023-12-10 10:05:18 -0700 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2023-12-10 10:05:18 -0700 |
| commit | 1f55c5cc698519094f751257db62ff274c015fdc (patch) | |
| tree | 844aabebe942e1e5c0ab07eeac838d9c9b9be0d3 | |
| parent | 4ac358c619e364ad767242409765c178da9d83e0 (diff) | |
| download | gcc-1f55c5cc698519094f751257db62ff274c015fdc.zip gcc-1f55c5cc698519094f751257db62ff274c015fdc.tar.gz gcc-1f55c5cc698519094f751257db62ff274c015fdc.tar.bz2 | |
[committed] Fix length computation of single bit bitfield extraction on H8
Various approaches are used to optimize extracting a sign extended single bit
bitfield. The length computation of 10 bytes was conservatively correct, but
inaccurate.
In particular when the bit we want is in the low half word we don't need the
move high half to low half instruction. Account for that in the length
computation.
This was spotted when looking at regressions in the generalized signed bitfield
extraction pattern.
This has been regression tested on the H8 port.
gcc/
* config/h8300/combiner.md (single bit signed bitfield extraction): Fix
length computation when the bit we want is in the low half word.
| -rw-r--r-- | gcc/config/h8300/combiner.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/h8300/combiner.md b/gcc/config/h8300/combiner.md index e1179b5..cce1878 100644 --- a/gcc/config/h8300/combiner.md +++ b/gcc/config/h8300/combiner.md @@ -1358,7 +1358,7 @@ to get that bit into the destination, properly extended. */ return "subx\t%s0,%s0\;exts.w %T0\;exts.l %0"; } - [(set_attr "length" "10")]) + [(set (attr "length") (symbol_ref "INTVAL (operands[2]) >= 16 ? 10 : 8"))]) ;; For shift counts >= 16 we can always do better than the ;; generic sequences. Other patterns handle smaller counts. |