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author | Uros Bizjak <uros@gcc.gnu.org> | 2017-01-05 20:09:25 +0100 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2017-01-05 20:09:25 +0100 |
commit | 1dc06b76ba609bb94f95a35c6ab21c2235ad80b1 (patch) | |
tree | 885714aa4d9a5ab7915d8666355c4306e5ac6dc1 | |
parent | 295ce2e534ccbf48e96d920ee23460e52bd67ccd (diff) | |
download | gcc-1dc06b76ba609bb94f95a35c6ab21c2235ad80b1.zip gcc-1dc06b76ba609bb94f95a35c6ab21c2235ad80b1.tar.gz gcc-1dc06b76ba609bb94f95a35c6ab21c2235ad80b1.tar.bz2 |
i386.md (*testqi_ext_3): No need to handle memory operands in a special way.
* config/i386/i386.md (*testqi_ext_3): No need to handle memory
operands in a special way. Assert that pos+len <= mode precision.
From-SVN: r244108
-rw-r--r-- | gcc/ChangeLog | 11 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 36 |
2 files changed, 22 insertions, 25 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 37db33c..0a242c0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-01-05 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*testqi_ext_3): No need to handle memory + operands in a special way. Assert that pos+len <= mode precision. + 2017-01-05 Jakub Jelinek <jakub@redhat.com> * common.opt (fvect-cost-model): Remove RejectNegative flag, use @@ -208,8 +213,7 @@ (signbit<mode>2_dm): Delete using <Fsignbit> and just use "wa". Update the length attribute if the value is in a GPR. (signbit<mode>2_dm_<su>ext): Add combiner pattern to eliminate - the sign or zero extension instruction, since the value is always - 0/1. + the sign or zero extension instruction, since the value is always 0/1. (signbit<mode>2_dm2): Delete using <Fsignbit>. PR target/78953 @@ -220,8 +224,7 @@ 2017-01-03 Ian Lance Taylor <iant@google.com> - * godump.c (go_format_type): Treat ENUMERAL_TYPE like - INTEGER_TYPE. + * godump.c (go_format_type): Treat ENUMERAL_TYPE like INTEGER_TYPE. 2017-01-03 Martin Sebor <msebor@redhat.com> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 807dc65..0181517 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8007,36 +8007,30 @@ rtx val = operands[2]; HOST_WIDE_INT len = INTVAL (operands[3]); HOST_WIDE_INT pos = INTVAL (operands[4]); - machine_mode mode, submode; + machine_mode mode = GET_MODE (val); - mode = GET_MODE (val); - if (MEM_P (val)) + if (SUBREG_P (val)) { - /* ??? Combine likes to put non-volatile mem extractions in QImode - no matter the size of the test. So find a mode that works. */ - if (! MEM_VOLATILE_P (val)) + machine_mode submode = GET_MODE (SUBREG_REG (val)); + + /* Narrow paradoxical subregs to prevent partial register stalls. */ + if (GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode) + && GET_MODE_CLASS (submode) == MODE_INT) { - mode = smallest_mode_for_size (pos + len, MODE_INT); - val = adjust_address (val, mode, 0); + val = SUBREG_REG (val); + mode = submode; } } - else if (SUBREG_P (val) - && (submode = GET_MODE (SUBREG_REG (val)), - GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode)) - && pos + len <= GET_MODE_BITSIZE (submode) - && GET_MODE_CLASS (submode) == MODE_INT) - { - /* Narrow a paradoxical subreg to prevent partial register stalls. */ - mode = submode; - val = SUBREG_REG (val); - } - else if (mode == HImode && pos + len <= 8) + + /* Small HImode tests can be converted to QImode. */ + if (register_operand (val, HImode) && pos + len <= 8) { - /* Small HImode tests can be converted to QImode. */ - mode = QImode; val = gen_lowpart (QImode, val); + mode = QImode; } + gcc_assert (pos + len <= GET_MODE_PRECISION (mode)); + wide_int mask = wi::shifted_mask (pos, len, false, GET_MODE_PRECISION (mode)); |