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| author | Nick Clifton <nickc@gcc.gnu.org> | 2003-03-13 13:27:17 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2003-03-13 13:27:17 +0000 |
| commit | 1ce537697ee63a275dc2b9bd5376ead4c3b717c2 (patch) | |
| tree | ad8b08cb89de02c49a6dec03cd5fd5d84a2d31fe | |
| parent | b17fe23365c469a63dfd65e26ead9f2b7b806586 (diff) | |
| download | gcc-1ce537697ee63a275dc2b9bd5376ead4c3b717c2.zip gcc-1ce537697ee63a275dc2b9bd5376ead4c3b717c2.tar.gz gcc-1ce537697ee63a275dc2b9bd5376ead4c3b717c2.tar.bz2 | |
Remove redundant writeback test in previous delta.
From-SVN: r64307
| -rw-r--r-- | gcc/config/arm/arm.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b7c8591..79088e3 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -7207,11 +7207,14 @@ print_multi_reg (stream, instr, reg, mask) fprintf (stream, "}"); /* Add a ^ character for the 26-bit ABI, but only if we were loading - the PC or not updating the stack pointer. Otherwise we generate - an UNPREDICTABLE instruction. */ + the PC. Otherwise we would generate an UNPREDICTABLE instruction. + Strictly speaking the instruction would be unpredicatble only if + we were writing back the base register as well, but since we never + want to generate an LDM type 2 instruction (register bank switching) + which is what you get if the PC is not being loaded, we do not need + to check for writeback. */ if (! TARGET_APCS_32 - && (((mask & (1 << PC_REGNUM)) != 0) - || strchr (instr, '!') == NULL)) + && ((mask & (1 << PC_REGNUM)) != 0)) fprintf (stream, "^"); fprintf (stream, "\n"); |