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| author | Pan Li <pan2.li@intel.com> | 2023-06-30 19:12:22 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-06-30 19:12:22 +0800 |
| commit | 1cde8e5d45d74cf7ba85772b99b41a7c81769ff4 (patch) | |
| tree | 93d8109ba56c4a35ddd450e8bef0a2223d86a64c | |
| parent | 4f8e31e01bd04ab17a53deb5aa44bd82c885b228 (diff) | |
| download | gcc-1cde8e5d45d74cf7ba85772b99b41a7c81769ff4.zip gcc-1cde8e5d45d74cf7ba85772b99b41a7c81769ff4.tar.gz gcc-1cde8e5d45d74cf7ba85772b99b41a7c81769ff4.tar.bz2 | |
RISC-V: Refactor vxrm_mode attr for type attr equal
This patch would like to refactor the vxrm_mode attr for duplicated
eq_attr condition. The common condition of attr is extraced to one
place instead of many places.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/vector.md: Refactor the common condition.
| -rw-r--r-- | gcc/config/riscv/vector.md | 39 |
1 files changed, 23 insertions, 16 deletions
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index 5e489dc..a6174f9 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -445,22 +445,29 @@ ;; Defines rounding mode of an fixed-point operation. (define_attr "vxrm_mode" "rnu,rne,rdn,rod,none" - (cond [(and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip") - (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNU")) - (const_string "rnu") - - (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip") - (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNE")) - (const_string "rne") - - (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip") - (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RDN")) - (const_string "rdn") - - (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip") - (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_ROD")) - (const_string "rod")] - (const_string "none"))) + (cond + [ + (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip") + (cond + [ + (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNU") + (const_string "rnu") + + (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNE") + (const_string "rne") + + (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RDN") + (const_string "rdn") + + (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_ROD") + (const_string "rod") + ] + (const_string "none") + ) + ] + (const_string "none") + ) +) ;; Defines rounding mode of an floating-point operation. (define_attr "frm_mode" "rne,rtz,rdn,rup,rmm,dyn,none" |