diff options
author | Michael Meissner <meissner@linux.ibm.com> | 2022-01-12 11:56:22 -0500 |
---|---|---|
committer | Michael Meissner <meissner@linux.ibm.com> | 2022-01-12 11:56:22 -0500 |
commit | 18d88d11973c63bda4e586b979b71d48c1d9b78a (patch) | |
tree | 4b19b9c1281dad1e235f32601f85ff630b59bd3f | |
parent | acc38526f6c74ad3540ecaa950f1d3c44f87d345 (diff) | |
download | gcc-18d88d11973c63bda4e586b979b71d48c1d9b78a.zip gcc-18d88d11973c63bda4e586b979b71d48c1d9b78a.tar.gz gcc-18d88d11973c63bda4e586b979b71d48c1d9b78a.tar.bz2 |
Fix pr101384-1.c code generation test.
Add support for the compiler using XXSPLTIB reg,255 to load all 1's into a
register on power9 and above instead of using VSPLTI{B,H,W} reg,-1.
gcc/testsuite/
2022-01-12 Michael Meissner <meissner@the-meissners.org>
PR testsuite/102935
* gcc.target/powerpc/pr101384-1.c: Update insn regexp for power9
and power10.
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr101384-1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/powerpc/pr101384-1.c b/gcc/testsuite/gcc.target/powerpc/pr101384-1.c index 627d7d7..41cf84b 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr101384-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr101384-1.c @@ -2,7 +2,7 @@ /* { dg-do compile { target le } } */ /* { dg-options "-O2 -maltivec" } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-final { scan-assembler-times {\mvspltis[whb] [^\n\r]*,-1\M} 9 } } */ +/* { dg-final { scan-assembler-times {\mvspltis[whb] [^\n\r]*,-1\M|\mxxspltib[^\n\r]*,255\M} 9 } } */ /* { dg-final { scan-assembler-times {\mvslw\M} 3 } } */ /* { dg-final { scan-assembler-times {\mvslh\M} 3 } } */ /* { dg-final { scan-assembler-times {\mvslb\M} 3 } } */ |