diff options
| author | David Edelsohn <edelsohn@gnu.org> | 2005-01-15 04:03:10 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2005-01-14 23:03:10 -0500 |
| commit | 165a5bad872543b77cd9519127d96d0c18e93e11 (patch) | |
| tree | e094e0c3112176af71d32781941447e24f56cd9d | |
| parent | 95f16434b09952b7be97aa5091a1300682f3afc1 (diff) | |
| download | gcc-165a5bad872543b77cd9519127d96d0c18e93e11.zip gcc-165a5bad872543b77cd9519127d96d0c18e93e11.tar.gz gcc-165a5bad872543b77cd9519127d96d0c18e93e11.tar.bz2 | |
rs6000.c (rs6k_nonimmediate_operand): Rename to rs6000_nonimmediate_operand.
* config/rs6000/rs6000.c (rs6k_nonimmediate_operand): Rename
to rs6000_nonimmediate_operand.
* config/rs6000/rs6000.h (PREDICATE_CODES): Rename
rs6k_nonimmediate_operand to rs6000_nonimmediate_operand.
* config/rs6000/rs6000.md (movsi_internal1): Rename predicate to
rs6000_nonimmediate_operand.
* config/rs6000/spe.md (movdf_e500_double): Rename predicate to
rs6000_nonimmediate_operand.
From-SVN: r93682
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/spe.md | 2 |
5 files changed, 15 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0cb38eb..750379d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2005-01-14 David Edelsohn <edelsohn@gnu.org> + + * config/rs6000/rs6000.c (rs6k_nonimmediate_operand): Rename + to rs6000_nonimmediate_operand. + * config/rs6000/rs6000.h (PREDICATE_CODES): Rename + rs6k_nonimmediate_operand to rs6000_nonimmediate_operand. + * config/rs6000/rs6000.md (movsi_internal1): Rename predicate to + rs6000_nonimmediate_operand. + * config/rs6000/spe.md (movdf_e500_double): Rename predicate to + rs6000_nonimmediate_operand. + 2005-01-14 Andrew Pinski <pinskia@physics.uc.edu> * tree-ssa-alias.c (pass_may_alias): Add TODO_verify_stmts. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index a8586a6..4da147c 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3060,7 +3060,7 @@ invalid_e500_subreg (rtx op, enum machine_mode mode) /* Just like nonimmediate_operand, but return 0 for invalid SUBREG's on the e500. */ int -rs6k_nonimmediate_operand (rtx op, enum machine_mode mode) +rs6000_nonimmediate_operand (rtx op, enum machine_mode mode) { if (TARGET_E500_DOUBLE && GET_CODE (op) == SUBREG diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 215fdcd..a2df1a5 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2592,7 +2592,7 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */ {"current_file_function_operand", {SYMBOL_REF}}, \ {"input_operand", {SUBREG, MEM, REG, CONST_INT, \ CONST_DOUBLE, SYMBOL_REF}}, \ - {"rs6k_nonimmediate_operand", {SUBREG, MEM, REG}}, \ + {"rs6000_nonimmediate_operand", {SUBREG, MEM, REG}}, \ {"load_multiple_operation", {PARALLEL}}, \ {"store_multiple_operation", {PARALLEL}}, \ {"lmw_operation", {PARALLEL}}, \ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 890088e..8679f10 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7709,7 +7709,7 @@ (set_attr "length" "4")]) (define_insn "*movsi_internal1" - [(set (match_operand:SI 0 "rs6k_nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h,*h") + [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h,*h") (match_operand:SI 1 "input_operand" "r,U,m,r,I,L,n,R,*h,r,r,r,0"))] "gpc_reg_operand (operands[0], SImode) || gpc_reg_operand (operands[1], SImode)" diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index c43adcb..4be52b3 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -2230,7 +2230,7 @@ ;; FIXME: Allow r=CONST0. (define_insn "*movdf_e500_double" - [(set (match_operand:DF 0 "rs6k_nonimmediate_operand" "=r,r,m") + [(set (match_operand:DF 0 "rs6000_nonimmediate_operand" "=r,r,m") (match_operand:DF 1 "input_operand" "r,m,r"))] "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && (gpc_reg_operand (operands[0], DFmode) |