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authorJohn Carr <jfc@mit.edu>1998-08-14 13:52:58 +0000
committerJohn Carr <jfc@gcc.gnu.org>1998-08-14 13:52:58 +0000
commit141dba98fdd28e263dbdf626ee97dd5cf70d3d86 (patch)
tree4288ececcad084d17e2667a706c700f7d2e2e1ed
parent64c7a80a984541525bcb3b23213a8e9c9bcb4807 (diff)
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genrecog.c (add_to_sequence): Fatal error if the modes of the operands of SET are incompatible.
* genrecog.c (add_to_sequence): Fatal error if the modes of the operands of SET are incompatible. * alpha.md: Fix max and min patterns so modes of SET operands match. From-SVN: r21731
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/alpha/alpha.md18
-rw-r--r--gcc/genrecog.c13
3 files changed, 29 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b7ab1a4..ade8ecf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Fri Aug 14 16:50:10 1998 John Carr <jfc@mit.edu>
+
+ * genrecog.c (add_to_sequence): Fatal error if the modes of the operands
+ of SET are incompatible.
+
+ * alpha.md: Fix max and min patterns so modes of SET operands match.
+
Fri Aug 14 12:22:55 1998 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Avoid [[ by using test and changequote.
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index c2eeaee..5ce750e 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -2284,7 +2284,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
- (if_then_else:DI
+ (if_then_else:SI
(match_operator 2 "signed_comparison_operator"
[(match_operand:DI 3 "reg_or_0_operand" "rJ,rJ,J,J")
(match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
@@ -2482,7 +2482,7 @@
(define_insn "sminqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
- (smin:SI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
+ (smin:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
(match_operand:QI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"minsb8 %r1,%2,%0"
@@ -2490,7 +2490,7 @@
(define_insn "uminqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
- (umin:SI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
+ (umin:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
(match_operand:QI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"minub8 %r1,%2,%0"
@@ -2498,7 +2498,7 @@
(define_insn "smaxqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
- (smax:SI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
+ (smax:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
(match_operand:QI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"maxsb8 %r1,%2,%0"
@@ -2506,7 +2506,7 @@
(define_insn "umaxqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
- (umax:SI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
+ (umax:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ")
(match_operand:QI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"maxub8 %r1,%2,%0"
@@ -2514,7 +2514,7 @@
(define_insn "sminhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
- (smin:SI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
+ (smin:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
(match_operand:HI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"minsw4 %r1,%2,%0"
@@ -2522,7 +2522,7 @@
(define_insn "uminhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
- (umin:SI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
+ (umin:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
(match_operand:HI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"minuw4 %r1,%2,%0"
@@ -2530,7 +2530,7 @@
(define_insn "smaxhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
- (smax:SI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
+ (smax:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
(match_operand:HI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"maxsw4 %r1,%2,%0"
@@ -2538,7 +2538,7 @@
(define_insn "umaxhi3"
[(set (match_operand:HI 0 "register_operand" "=r")
- (umax:SI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
+ (umax:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ")
(match_operand:HI 2 "reg_or_8bit_operand" "rI")))]
"TARGET_MAX"
"maxuw4 %r1,%2,%0"
diff --git a/gcc/genrecog.c b/gcc/genrecog.c
index a4b14e3..4dd5ec7 100644
--- a/gcc/genrecog.c
+++ b/gcc/genrecog.c
@@ -456,6 +456,19 @@ add_to_sequence (pattern, last, position)
goto restart;
case SET:
+ /* The operands of a SET must have the same mode unless one is VOIDmode. */
+ if (GET_MODE (SET_SRC (pattern)) != VOIDmode
+ && GET_MODE (SET_DEST (pattern)) != VOIDmode
+ && GET_MODE (SET_SRC (pattern)) != GET_MODE (SET_DEST (pattern))
+ /* The mode of an ADDRESS_OPERAND is the mode of the memory reference,
+ not the mode of the address. */
+ && ! (GET_CODE (SET_SRC (pattern)) == MATCH_OPERAND
+ && ! strcmp (XSTR (SET_SRC (pattern), 1), "address_operand")))
+ {
+ print_rtl (stderr, pattern);
+ fputc ('\n', stderr);
+ fatal ("mode mismatch in SET");
+ }
newpos[depth] = '0';
new = add_to_sequence (SET_DEST (pattern), &new->success, newpos);
this->success.first->enforce_mode = 1;