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| author | Jerome Lambourg <lambourg@adacore.com> | 2018-05-22 13:21:05 +0000 |
|---|---|---|
| committer | Pierre-Marie de Rodat <pmderodat@gcc.gnu.org> | 2018-05-22 13:21:05 +0000 |
| commit | 14141ce8e5b243407e80e7978c428f0f96aecf61 (patch) | |
| tree | 65a1daeb1e22d3582e172a196527ba598637d65f | |
| parent | f2df0100b287653c12f807c2e9d6a64d0982428f (diff) | |
| download | gcc-14141ce8e5b243407e80e7978c428f0f96aecf61.zip gcc-14141ce8e5b243407e80e7978c428f0f96aecf61.tar.gz gcc-14141ce8e5b243407e80e7978c428f0f96aecf61.tar.bz2 | |
[Ada] Fix stack alignment issue in the signal trampoline on QNX
The stack on AArch64 is 128-bit aligned to allow Neon and FPU operations.
2018-05-22 Jerome Lambourg <lambourg@adacore.com>
gcc/ada/
* sigtramp-qnx.c: Fix stack alignment issue in the signal trampoline.
From-SVN: r260512
| -rw-r--r-- | gcc/ada/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/ada/sigtramp-qnx.c | 11 |
2 files changed, 10 insertions, 5 deletions
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index aae611c..c8e4d4d 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,7 @@ +2018-05-22 Jerome Lambourg <lambourg@adacore.com> + + * sigtramp-qnx.c: Fix stack alignment issue in the signal trampoline. + 2018-05-22 Ed Schonberg <schonberg@adacore.com> * freeze.adb (Freeze_Fixed_Point_Type): If the first subtype has diff --git a/gcc/ada/sigtramp-qnx.c b/gcc/ada/sigtramp-qnx.c index 23f14e5..1a9b616 100644 --- a/gcc/ada/sigtramp-qnx.c +++ b/gcc/ada/sigtramp-qnx.c @@ -215,17 +215,18 @@ TCR("ret") #define SIGTRAMP_BODY \ CFI_DEF_CFA \ CFI_COMMON_REGS \ - TCR("# Push FP and LR on stack") \ - TCR("stp x29, x30, [sp, #-16]!") \ + TCR("# Allocate the frame (16bytes aligned) and push FP and LR") \ + TCR("stp x29, x30, [sp, #-32]!") \ + TCR("add x29, sp, 0") \ TCR("# Push register used to hold the CFA on stack") \ - TCR("str x" S(CFA_REG) ", [sp, #-8]!") \ + TCR("str x" S(CFA_REG) ", [sp, 16]") \ TCR("# Set the CFA: x2 value") \ TCR("mov x" S(CFA_REG) ", x2") \ TCR("# Call the handler") \ TCR("blr x3") \ TCR("# Release our frame and return (should never get here!).") \ - TCR("ldr x" S(CFA_REG) " , [sp], 8") \ - TCR("ldp x29, x30, [sp], 16") \ + TCR("ldr x" S(CFA_REG) ", [sp, 16]") \ + TCR("ldp x29, x30, [sp], 32") \ TCR("ret") #endif /* AARCH64 */ |