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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2014-07-17 19:36:17 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2014-07-17 19:36:17 +0000 |
| commit | 13caea3d9daddb31f9df71d291940e1fb1d755de (patch) | |
| tree | a84de63b38dd82d9a17b83c387e14e6f3299c4c9 | |
| parent | 835dee55a19b764fe246e5c86264af66b73bd313 (diff) | |
| download | gcc-13caea3d9daddb31f9df71d291940e1fb1d755de.zip gcc-13caea3d9daddb31f9df71d291940e1fb1d755de.tar.gz gcc-13caea3d9daddb31f9df71d291940e1fb1d755de.tar.bz2 | |
umips-lwp-1.c (foo): Use a shift/add sequence involving both inputs rather than a multiplication...
gcc/testsuite/
* gcc.target/mips/umips-lwp-1.c (foo): Use a shift/add sequence
involving both inputs rather than a multiplication involving one.
* gcc.target/mips/umips-lwp-2.c (foo): Likewise.
* gcc.target/mips/umips-lwp-3.c (foo): Likewise.
* gcc.target/mips/umips-lwp-4.c (foo): Likewise.
From-SVN: r212763
| -rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/umips-lwp-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/umips-lwp-2.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/umips-lwp-3.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/umips-lwp-4.c | 2 |
5 files changed, 12 insertions, 4 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 55cf9e5..f6e9f23 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2014-07-17 Richard Sandiford <rdsandiford@googlemail.com> + + * gcc.target/mips/umips-lwp-1.c (foo): Use a shift/add sequence + involving both inputs rather than a multiplication involving one. + * gcc.target/mips/umips-lwp-2.c (foo): Likewise. + * gcc.target/mips/umips-lwp-3.c (foo): Likewise. + * gcc.target/mips/umips-lwp-4.c (foo): Likewise. + 2014-07-17 Paolo Carlini <paolo.carlini@oracle.com> PR c++/50961 diff --git a/gcc/testsuite/gcc.target/mips/umips-lwp-1.c b/gcc/testsuite/gcc.target/mips/umips-lwp-1.c index 0cdb1b7..8354bf7 100644 --- a/gcc/testsuite/gcc.target/mips/umips-lwp-1.c +++ b/gcc/testsuite/gcc.target/mips/umips-lwp-1.c @@ -6,7 +6,7 @@ foo (int *r4) { int r5 = r4[0]; int r6 = r4[1]; - r4[2] = r5 * r5; + r4[2] = (r5 << 1) + r6; { register int r5asm asm ("$5") = r5; register int r6asm asm ("$6") = r6; diff --git a/gcc/testsuite/gcc.target/mips/umips-lwp-2.c b/gcc/testsuite/gcc.target/mips/umips-lwp-2.c index ea3f396..6622cf1 100644 --- a/gcc/testsuite/gcc.target/mips/umips-lwp-2.c +++ b/gcc/testsuite/gcc.target/mips/umips-lwp-2.c @@ -6,7 +6,7 @@ foo (int *r4) { int r5 = r4[0]; int r6 = r4[1]; - r4[2] = r6 * r6; + r4[2] = (r6 << 1) + r5; { register int r5asm asm ("$5") = r5; register int r6asm asm ("$6") = r6; diff --git a/gcc/testsuite/gcc.target/mips/umips-lwp-3.c b/gcc/testsuite/gcc.target/mips/umips-lwp-3.c index 2cb3751..46c51e3 100644 --- a/gcc/testsuite/gcc.target/mips/umips-lwp-3.c +++ b/gcc/testsuite/gcc.target/mips/umips-lwp-3.c @@ -6,7 +6,7 @@ foo (int *r4) { int r5 = r4[511]; int r6 = r4[512]; - r4[2] = r5 * r5; + r4[2] = (r5 << 1) + r6; { register int r5asm asm ("$5") = r5; register int r6asm asm ("$6") = r6; diff --git a/gcc/testsuite/gcc.target/mips/umips-lwp-4.c b/gcc/testsuite/gcc.target/mips/umips-lwp-4.c index b8a86b4..dd107ad 100644 --- a/gcc/testsuite/gcc.target/mips/umips-lwp-4.c +++ b/gcc/testsuite/gcc.target/mips/umips-lwp-4.c @@ -6,7 +6,7 @@ foo (int *r4) { int r5 = r4[511]; int r6 = r4[512]; - r4[2] = r6 * r6; + r4[2] = (r6 << 1) + r5; { register int r5asm asm ("$5") = r5; register int r6asm asm ("$6") = r6; |