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| author | H.J. Lu <hongjiu.lu@intel.com> | 2006-09-11 21:34:06 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2006-09-11 14:34:06 -0700 |
| commit | 1395ea397e41bfeadbda2f2a9b5f39513bda2844 (patch) | |
| tree | bf69a11670b8b23ee210691e7fa78fd6f6e0a043 | |
| parent | d30673031579bf894eb1dc702ea892e0a32c0741 (diff) | |
| download | gcc-1395ea397e41bfeadbda2f2a9b5f39513bda2844.zip gcc-1395ea397e41bfeadbda2f2a9b5f39513bda2844.tar.gz gcc-1395ea397e41bfeadbda2f2a9b5f39513bda2844.tar.bz2 | |
re PR target/13685 (Building simple test application with -march=pentium3 -Os gives SIGSEGV (unaligned sse instruction))
gcc/
2006-09-11 H.J. Lu <hongjiu.lu@intel.com>
PR target/13685
PR target/27537
PR target/28621
* config/i386/i386.c (override_options): Always default to 16
byte stack boundary.
gcc/testsuite/
2006-09-11 H.J. Lu <hongjiu.lu@intel.com>
PR target/13685
* gcc.target/i386/pr13685.c: New test.
From-SVN: r116860
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr13685.c | 39 |
4 files changed, 56 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b1a92ec..d2b3658 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2006-09-11 H.J. Lu <hongjiu.lu@intel.com> + + PR target/13685 + PR target/27537 + PR target/28621 + * config/i386/i386.c (override_options): Always default to 16 + byte stack boundary. + 2006-09-11 Alexandre Oliva <aoliva@redhat.com> PR target/28672 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index be17c02..daba68d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1899,12 +1899,10 @@ override_options (void) } /* Validate -mpreferred-stack-boundary= value, or provide default. - The default of 128 bits is for Pentium III's SSE __m128, but we - don't want additional code to keep the stack aligned when - optimizing for code size. */ - ix86_preferred_stack_boundary - = (TARGET_64BIT || TARGET_MACHO || TARGET_SSE || !optimize_size) - ? 128 : 32; + The default of 128 bits is for Pentium III's SSE __m128. We can't + change it because of optimize_size. Otherwise, we can't mix object + files compiled with -Os and -On. */ + ix86_preferred_stack_boundary = 128; if (ix86_preferred_stack_boundary_string) { i = atoi (ix86_preferred_stack_boundary_string); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3be624e..72711d6 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2006-09-11 H.J. Lu <hongjiu.lu@intel.com> + + PR target/13685 + * gcc.target/i386/pr13685.c: New test. + 2006-09-11 Eric Botcazou <ebotcazou@libertysurf.fr> * gcc.dg/pr28726.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/pr13685.c b/gcc/testsuite/gcc.target/i386/pr13685.c new file mode 100644 index 0000000..7c4446a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr13685.c @@ -0,0 +1,39 @@ +/* PR target/13685 */ +/* { dg-do run } */ +/* { dg-options "-Os -msse" } */ +#include <stdlib.h> +#include <stdio.h> +#include <xmmintrin.h> +#include "../../gcc.dg/i386-cpuid.h" + +void foo (__m128 *, __m64 *, int); + +__m128 xmm0 = { 0 }; +__m64 mm0 = { 0 }; + +int +main () +{ + unsigned long cpu_facilities = i386_cpuid (); + + if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV)) + != (bit_MMX | bit_SSE | bit_CMOV)) + /* If host has no SSE support, pass. */ + return 0; + + foo (&xmm0, &mm0, 4); + return 0; +} + +void +foo (__m128 *dst, __m64 *src, int n) +{ + __m128 xmm0 = { 0 }; + while (n > 64) + { + puts (""); + xmm0 = _mm_cvtpi32_ps (xmm0, *src); + *dst = xmm0; + n--; + } +} |