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author | Haochen Jiang <haochen.jiang@intel.com> | 2023-12-12 16:38:47 +0800 |
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committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-12-13 10:15:29 +0800 |
commit | 1243a057beb53074c40805490b0e204e64000291 (patch) | |
tree | 385f5717f207e42b054f752187fd7609316fc329 | |
parent | a9046f1979f05c1fd4e69a3bbf5a8629e2573fd3 (diff) | |
download | gcc-1243a057beb53074c40805490b0e204e64000291.zip gcc-1243a057beb53074c40805490b0e204e64000291.tar.gz gcc-1243a057beb53074c40805490b0e204e64000291.tar.bz2 |
i386: Fix PR110790 testcase
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr110790-2.c: Change scan-assembler from shrq
to shr\[qx\].
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr110790-2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/i386/pr110790-2.c b/gcc/testsuite/gcc.target/i386/pr110790-2.c index 16c73cb..dbb5263 100644 --- a/gcc/testsuite/gcc.target/i386/pr110790-2.c +++ b/gcc/testsuite/gcc.target/i386/pr110790-2.c @@ -21,5 +21,5 @@ refmpn_tstbit_bad (mp_srcptr ptr, unsigned long bit) shrq %cl, %rax andl $1, %eax */ -/* { dg-final { scan-assembler-times "shrq" 2 { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times "shr\[qx\]" 2 { target { lp64 } } } } */ /* { dg-final { scan-assembler-times "andl" 2 { target { lp64 } } } } */ |