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| author | Jan Hubicka <hubicka@freesoft.cz> | 1999-04-13 16:15:46 +0200 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 1999-04-13 07:15:46 -0700 |
| commit | 0ffc4dca8ed0e0305a3499164dd8b1913d6aa48e (patch) | |
| tree | 48c638714cff6d9580d84b2e4ddee8ba60812d65 | |
| parent | b81194219bfbe82e3a10f9aea2a93affb160642f (diff) | |
| download | gcc-0ffc4dca8ed0e0305a3499164dd8b1913d6aa48e.zip gcc-0ffc4dca8ed0e0305a3499164dd8b1913d6aa48e.tar.gz gcc-0ffc4dca8ed0e0305a3499164dd8b1913d6aa48e.tar.bz2 | |
Jan Hubicka <hubicka@freesoft.cz>
Jan Hubicka <hubicka@freesoft.cz>
* i386.md: Do not output mov %0,reg on AMD K6.
From-SVN: r26406
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 18 |
2 files changed, 18 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ee6ed83..9cdc3f4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +Tue Apr 13 14:14:06 1999 Jan Hubicka <hubicka@freesoft.cz> + + * i386.md: Do not output mov %0,reg on AMD K6. + Tue Apr 13 12:14:07 1999 Dave Brolley <brolley@cygnus.com> * cppinit.c (cpp_start_read): Fix buffer overwrite. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 8eade3e..7e143ac 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -983,8 +983,13 @@ "* { rtx link; - if ((ix86_cpu != PROCESSOR_K6 || optimize_size) - && operands[1] == const0_rtx && REG_P (operands[0])) + + /* Use of xor was disabled for AMD K6 as recommended by the Optimization + Manual. My test shows, that this generally hurts the performance, because + mov is longer and takes longer to decode and decoding is the main + bottleneck of K6 when executing GCC code. */ + + if (operands[1] == const0_rtx && REG_P (operands[0])) return AS2 (xor%L0,%0,%0); if (operands[1] == const1_rtx @@ -1111,8 +1116,13 @@ "* { rtx link; - if ((ix86_cpu != PROCESSOR_K6 || optimize_size) - && operands[1] == const0_rtx && REG_P (operands[0])) + + /* Use of xor was disabled for AMD K6 as recommended by the Optimization + Manual. My test shows, that this generally hurts the performance, because + mov is longer and takes longer to decode and decoding is the main + bottleneck of K6 when executing GCC code. */ + + if (operands[1] == const0_rtx && REG_P (operands[0])) return AS2 (xor%W0,%0,%0); if (operands[1] == const1_rtx |