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| author | Richard Earnshaw <rearnsha@arm.com> | 2009-12-17 11:50:06 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2009-12-17 11:50:06 +0000 |
| commit | 0f727c8270a451cb1472b498d056b6e5cf812e2c (patch) | |
| tree | 45311ffd540f0c2e3bf3c823ceaf7b92a5285be1 | |
| parent | 4cdec9524d742550379ff066f3d4db41e64c3e64 (diff) | |
| download | gcc-0f727c8270a451cb1472b498d056b6e5cf812e2c.zip gcc-0f727c8270a451cb1472b498d056b6e5cf812e2c.tar.gz gcc-0f727c8270a451cb1472b498d056b6e5cf812e2c.tar.bz2 | |
re PR target/42372 (Regrename reuses non-dead register)
PR target/42372
* arm.md (pic_add_dot_plus_eight): Change output constraint from
update to write.
From-SVN: r155310
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 669d959..fce7c7c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2009-12-17 Richard Earnshaw <rearnsha@arm.com> + + PR target/42372 + * arm.md (pic_add_dot_plus_eight): Change output constraint from + update to write. + 2009-12-17 Shujing Zhao <pearly.zhao@oracle.com> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 9940292..367b00d 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -5292,7 +5292,7 @@ ) (define_insn "tls_load_dot_plus_eight" - [(set (match_operand:SI 0 "register_operand" "+r") + [(set (match_operand:SI 0 "register_operand" "=r") (mem:SI (unspec:SI [(match_operand:SI 1 "register_operand" "r") (const_int 8) (match_operand 2 "" "")] |