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authorToshiyasu Morita <tm@netcom.com>1999-04-03 15:29:41 +0000
committerJeff Law <law@gcc.gnu.org>1999-04-03 08:29:41 -0700
commit0ea78edbd7375b83ae45d275e89fc8a5e0b25ebb (patch)
tree2b992d75cb0febac853d6e478477ea1521048402
parent1ed9faeecbbba8773351ef52c72611327c4c049b (diff)
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* gcc.texi: Add info on regmove pass
From-SVN: r26160
-rw-r--r--gcc/ChangeLog2
-rw-r--r--gcc/gcc.texi12
2 files changed, 14 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 04fa23f..07b77f8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,7 @@
Sat Apr 3 16:22:59 1999 Toshiyasu Morita (tm@netcom.com)
+ * gcc.texi: Add info on regmove pass
+
* regmove.c (fixup_match_1): Consistently evaluate
HAVE_POST_INCREMENT and HAVE_POST_DECREMENT.
diff --git a/gcc/gcc.texi b/gcc/gcc.texi
index 4f9ceeb..1682816 100644
--- a/gcc/gcc.texi
+++ b/gcc/gcc.texi
@@ -3458,6 +3458,18 @@ The option @samp{-dc} causes a debugging dump of the RTL code after
this pass. This dump file's name is made by appending @samp{.combine}
to the input file name.
+@cindex register movement
+@item
+Register movement (@file{regmove.c}). This pass looks for cases where
+matching constraints would force an instruction to need a reload, and
+this reload would be a register to register move. It them attempts
+to change the registers used by the instruction to avoid the move
+instruction.
+
+The option @samp{-dN} causes a debugging dump of the RTL code after
+this pass. This dump file's name is made by appending @samp{.regmove}
+to the input file name.
+
@cindex instruction scheduling
@cindex scheduling, instruction
@item