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authorRobert Suchanek <robert.suchanek@imgtec.com>2016-05-16 14:21:02 +0000
committerRobert Suchanek <rts@gcc.gnu.org>2016-05-16 14:21:02 +0000
commit0bc8d0b3c1263f1bb039922ad41b35ab841529b0 (patch)
tree3f64e2a4e15d12bf76fbbb5ea34b29570f810970
parent7065002128b529d194a358266546d5561060405a (diff)
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Enable LSA/DLSA for MSA.
* config/mips/mips.h (ISA_HAS_LSA): Enable for -mmsa. (ISA_HAS_DLSA): Ditto. From-SVN: r236289
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/mips/mips.h6
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 02f38cf..ef55079 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-16 Robert Suchanek <robert.suchanek@imgtec.com>
+
+ * config/mips/mips.h (ISA_HAS_LSA): Enable for -mmsa.
+ (ISA_HAS_DLSA): Ditto.
+
2016-05-16 Matthew Fortune <matthew.fortune@imgtec.com>
* config/mips/m5100.md (m51_int_load): Update the latency to 2.
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 1efa61a..e8897d1 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -209,10 +209,12 @@ struct mips_cpu_info {
#endif
/* ISA has LSA available. */
-#define ISA_HAS_LSA (mips_isa_rev >= 6)
+#define ISA_HAS_LSA (mips_isa_rev >= 6 || ISA_HAS_MSA)
/* ISA has DLSA available. */
-#define ISA_HAS_DLSA (TARGET_64BIT && mips_isa_rev >= 6)
+#define ISA_HAS_DLSA (TARGET_64BIT \
+ && (mips_isa_rev >= 6 \
+ || ISA_HAS_MSA))
/* The ISA compression flags that are currently in effect. */
#define TARGET_COMPRESSION (target_flags & (MASK_MIPS16 | MASK_MICROMIPS))