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| author | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-10-29 01:49:45 +0100 |
|---|---|---|
| committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-12-06 21:22:11 +0000 |
| commit | 09a08df71939cc0035ebae85220ff0214a38fb7c (patch) | |
| tree | 9ae3479c38f1634efc85c44919e456832c8b5968 | |
| parent | 88157c88172b06f1afb6136e9bd8fce1de5ba823 (diff) | |
| download | gcc-09a08df71939cc0035ebae85220ff0214a38fb7c.zip gcc-09a08df71939cc0035ebae85220ff0214a38fb7c.tar.gz gcc-09a08df71939cc0035ebae85220ff0214a38fb7c.tar.bz2 | |
aarch64: Add rsr128 and wsr128 ACLE tests
Extend existing unit tests for the ACLE system register manipulation
functions to include 128-bit tests.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/acle/rwsr.c (get_rsr128): New.
(set_wsr128): Likewise.
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/acle/rwsr.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c b/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c index 93c48c4..6feb0be 100644 --- a/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c +++ b/gcc/testsuite/gcc.target/aarch64/acle/rwsr.c @@ -6,6 +6,38 @@ #include <arm_acle.h> +#pragma GCC push_options +#pragma GCC target ("arch=armv9.4-a+d128") + +#ifndef __ARM_FEATURE_SYSREG128 +#error "__ARM_FEATURE_SYSREG128 feature macro not defined." +#endif + +/* +** get_rsr128: +** mrrs x0, x1, s3_0_c7_c4_0 +** ... +*/ +__uint128_t +get_rsr128 () +{ + __arm_rsr128 ("par_el1"); +} + +/* +** set_wsr128: +** ... +** msrr s3_0_c7_c4_0, x0, x1 +** ... +*/ +void +set_wsr128 (__uint128_t c) +{ + __arm_wsr128 ("par_el1", c); +} + +#pragma GCC pop_options + /* ** get_rsr: ** ... |