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| author | Uros Bizjak <uros@gcc.gnu.org> | 2011-05-19 23:09:25 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2011-05-19 23:09:25 +0200 |
| commit | 0955cf616c9da0fbd6721dec1e39048559483a45 (patch) | |
| tree | a29fb8b35e98c988f9c6abaf8cef0c3bd30e949b | |
| parent | 4409de247c778276c0445f3d9f8817562f152b78 (diff) | |
| download | gcc-0955cf616c9da0fbd6721dec1e39048559483a45.zip gcc-0955cf616c9da0fbd6721dec1e39048559483a45.tar.gz gcc-0955cf616c9da0fbd6721dec1e39048559483a45.tar.bz2 | |
i386.c (option_override_internal): Enable TARGET_CMOVE when TARGET_RDRND is active.
* config/i386/i386.c (option_override_internal): Enable TARGET_CMOVE
when TARGET_RDRND is active.
(ix86_expand_builtin) <case IX86_BUILTIN_RDRAND{16,32,64}_STEP>:
Generate dummy SImode target register when target is NULL.
From-SVN: r173921
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 23 |
2 files changed, 21 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 96d783e..f2c4b2b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2011-05-19 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (option_override_internal): Enable TARGET_CMOVE + when TARGET_RDRND is active. + (ix86_expand_builtin) <case IX86_BUILTIN_RDRAND{16,32,64}_STEP>: + Generate dummy SImode target register when target is NULL. + 2011-05-19 Joseph Myers <joseph@codesourcery.com> * config/arm/arm-fpus.def: New. @@ -59,8 +66,7 @@ Remove ATTRIBUTE_UNUSED. [!USE_GAS]: Call solaris_elf_asm_comdat_section for SECTION_LINKONCE sections if HAVE_COMDAT_GROUP. - * config/sparc/sparc.c (sparc_solaris_elf_asm_named_section): - Likewise. + * config/sparc/sparc.c (sparc_solaris_elf_asm_named_section): Likewise. * config/i386/sol2-10.h (TARGET_ASM_NAMED_SECTION): Moved ... * config/i386/sol2.h (TARGET_ASM_NAMED_SECTION): ... here. * config/sparc/sol2.h (TARGET_ASM_CODE_END): Redefine. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 15dde25..0709be8 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4091,8 +4091,9 @@ ix86_option_override_internal (bool main_args_p) } /* For sane SSE instruction set generation we need fcomi instruction. - It is safe to enable all CMOVE instructions. */ - if (TARGET_SSE) + It is safe to enable all CMOVE instructions. Also, RDRAND intrinsic + expands to a sequence that includes conditional move. */ + if (TARGET_SSE || TARGET_RDRND) TARGET_CMOVE = 1; /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */ @@ -27613,6 +27614,12 @@ rdrand_step: op0 = gen_reg_rtx (mode0); emit_insn (GEN_FCN (icode) (op0)); + arg0 = CALL_EXPR_ARG (exp, 0); + op1 = expand_normal (arg0); + if (!address_operand (op1, VOIDmode)) + op1 = copy_addr_to_reg (op1); + emit_move_insn (gen_rtx_MEM (mode0, op1), op0); + op1 = gen_reg_rtx (SImode); emit_move_insn (op1, CONST1_RTX (SImode)); @@ -27627,17 +27634,13 @@ rdrand_step: else op2 = gen_rtx_SUBREG (SImode, op0, 0); + if (target == 0) + target = gen_reg_rtx (SImode); + pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG), const0_rtx); - emit_insn (gen_rtx_SET (VOIDmode, op1, + emit_insn (gen_rtx_SET (VOIDmode, target, gen_rtx_IF_THEN_ELSE (SImode, pat, op2, op1))); - emit_move_insn (target, op1); - - arg0 = CALL_EXPR_ARG (exp, 0); - op1 = expand_normal (arg0); - if (!address_operand (op1, VOIDmode)) - op1 = copy_addr_to_reg (op1); - emit_move_insn (gen_rtx_MEM (mode0, op1), op0); return target; default: |