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author | Uros Bizjak <uros@gcc.gnu.org> | 2017-10-11 23:15:59 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2017-10-11 23:15:59 +0200 |
commit | 07a5fe52c547185a5fc9ef5b0f205016c3ee35f3 (patch) | |
tree | 9cec49cd92325a13efb5e85e54c9f82752242704 | |
parent | ca38a07b0637440d40ac7f6f987a16c825f00aa4 (diff) | |
download | gcc-07a5fe52c547185a5fc9ef5b0f205016c3ee35f3.zip gcc-07a5fe52c547185a5fc9ef5b0f205016c3ee35f3.tar.gz gcc-07a5fe52c547185a5fc9ef5b0f205016c3ee35f3.tar.bz2 |
i386.c (ix86_canonicalize_comparison): New function.
* config/i386/i386.c (ix86_canonicalize_comparison): New function.
(TARGET_CANONICALIZE_COMPARISON): Define.
testsuite/ChangeLog:
* gcc.target/i386/387-ficom-2.c: New test.
From-SVN: r253663
-rw-r--r-- | gcc/ChangeLog | 24 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 27 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 14 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/387-ficom-2.c | 9 |
4 files changed, 60 insertions, 14 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index deda4e5..4e0d71e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-10-11 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_canonicalize_comparison): New function. + (TARGET_CANONICALIZE_COMPARISON): Define. + 2017-10-11 Qing Zhao <qing.zhao@oracle.com> PR target/81422 @@ -114,7 +119,8 @@ (ix86_min_insn_size): ... this one; export. (core2i7_first_cycle_multipass_begin): Move to x86-tune-sched-core.c. (core2i7_first_cycle_multipass_issue): Move to x86-tune-sched-core.c. - (core2i7_first_cycle_multipass_backtrack): Move to x86-tune-sched-core.c. + (core2i7_first_cycle_multipass_backtrack): Move to + x86-tune-sched-core.c. (core2i7_first_cycle_multipass_end): Move to x86-tune-sched-core.c. (core2i7_first_cycle_multipass_fini): Move to x86-tune-sched-core.c. (ix86_sched_init_global): Break up logic to ix86_core2i7_init_hooks. @@ -665,7 +671,6 @@ * builtins.def (BUILT_IN_SETJMP): Revert latest change. 2017-10-08 Jan Hubicka <hubicka@ucw.cz> -2017-10-08 Jan Hubicka <hubicka@ucw.cz> * i386.c (ix86_expand_set_or_movmem): Disable 512bit loops for targets that preffer 128bit. @@ -892,7 +897,8 @@ (znver1_cost): Set scalar reassoc width to 4 and vector to 3 and 6 for int and fp. (atom_cost): Set reassociation width to 2. - (slm_cost, generic_cost): Set fp reassociation width to 2 and 1 otherwise. + (slm_cost, generic_cost): Set fp reassociation width + to 2 and 1 otherwise. (intel_cost): Set fp reassociation width to 4 and 1 otherwise. (core_cost): Set fp reassociation width to 4 and vector to 2. (ix86_reassociation_width): Rewrite using cost table; special case @@ -1158,7 +1164,7 @@ (class dom_opt_dom_walker): Initialize m_dummy_cond member in the class ctor. (pass_dominator:execute): Build the dummy_cond here and pass it - to the dom_opt_dom_walker ctor. + to the dom_opt_dom_walker ctor. (test_for_singularity): New function. 2017-09-30 Krister Walfridsson <krister.walfridsson@gmail.com> @@ -1603,7 +1609,7 @@ * rs6000.md (allocate_stack): Handle -fstack-clash-protection. (probe_stack_range<P:mode>): Operand 0 is now early-clobbered. Add additional operand and pass it to output_probe_stack_range. - + 2017-09-25 Bin Cheng <bin.cheng@arm.com> PR tree-optimization/82163 @@ -2035,7 +2041,7 @@ 2017-09-22 Sergey Shalnov <sergey.shalnov@intel.com> - * config/i386/sse.md ("mov<mode>_internal"): Use <sseinsnmode> + * config/i386/sse.md ("mov<mode>_internal"): Use <sseinsnmode> mode attribute for TARGET_AVX512VL. 2017-09-21 Sergey Shalnov <sergey.shalnov@intel.com> @@ -2314,9 +2320,9 @@ (ix86_expand_prologue): Dump stack clash info as needed. Call ix86_adjust_stack_and_probe_stack_clash as needed. - * function.c (dump_stack_clash_frame_info): New function. - * function.h (dump_stack_clash_frame_info): Prototype. - (enum stack_clash_probes): New enum. + * function.c (dump_stack_clash_frame_info): New function. + * function.h (dump_stack_clash_frame_info): Prototype. + (enum stack_clash_probes): New enum. * config/alpha/alpha.c (alpha_expand_prologue): Also check flag_stack_clash_protection. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ca060b52..d7482bc 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4792,6 +4792,30 @@ ix86_conditional_register_usage (void) fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; } +/* Canonicalize a comparison from one we don't have to one we do have. */ + +static void +ix86_canonicalize_comparison (int *code, rtx *op0, rtx *op1, + bool op0_preserve_value) +{ + /* The order of operands in x87 ficom compare is forced by combine in + simplify_comparison () function. Float operator is treated as RTX_OBJ + with a precedence over other operators and is always put in the first + place. Swap condition and operands to match ficom instruction. */ + if (!op0_preserve_value + && GET_CODE (*op0) == FLOAT && MEM_P (XEXP (*op0, 0)) && REG_P (*op1)) + { + enum rtx_code scode = swap_condition ((enum rtx_code) *code); + + /* We are called only for compares that are split to SAHF instruction. + Ensure that we have setcc/jcc insn for the swapped condition. */ + if (ix86_fp_compare_code_to_integer (scode) != UNKNOWN) + { + std::swap (*op0, *op1); + *code = (int) scode; + } + } +} /* Save the current options */ @@ -49649,6 +49673,9 @@ ix86_run_selftests (void) #undef TARGET_CONDITIONAL_REGISTER_USAGE #define TARGET_CONDITIONAL_REGISTER_USAGE ix86_conditional_register_usage +#undef TARGET_CANONICALIZE_COMPARISON +#define TARGET_CANONICALIZE_COMPARISON ix86_canonicalize_comparison + #undef TARGET_LOOP_UNROLL_ADJUST #define TARGET_LOOP_UNROLL_ADJUST ix86_loop_unroll_adjust diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7ea4bd2..a2daea4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-10-11 Uros Bizjak <ubizjak@gmail.com> + + * gcc.target/i386/387-ficom-2.c: New test. + 2017-10-11 Jakub Jelinek <jakub@redhat.com> PR middle-end/80421 @@ -18,7 +22,7 @@ 2017-10-11 Qing Zhao <qing.zhao@oracle.com> PR target/81422 - * gcc.target/aarch64/pr81422.C: New test. + * gcc.target/aarch64/pr81422.C: New test. 2017-10-11 Vladimir Makarov <vmakarov@redhat.com> @@ -1084,7 +1088,7 @@ 2017-09-22 Sergey Shalnov <sergey.shalnov@intel.com> - * gcc.target/i386/avx512f-constant-set.c: New test. + * gcc.target/i386/avx512f-constant-set.c: New test. 2017-09-21 Sergey Shalnov <sergey.shalnov@intel.com> @@ -2653,7 +2657,7 @@ 2017-08-23 Richard Biener <rguenther@suse.de> - PR target/81921 + PR target/81921 * gcc.target/i386/pr81921.c: New testcase. 2017-08-23 Daniel Santos <daniel.santos@pobox.com> @@ -2734,8 +2738,8 @@ 2017-08-22 Yvan Roux <yvan.roux@linaro.org> - PR c++/80287 - * g++.dg/pr80287.C: New test. + PR c++/80287 + * g++.dg/pr80287.C: New test. 2017-08-22 Richard Biener <rguenther@suse.de> diff --git a/gcc/testsuite/gcc.target/i386/387-ficom-2.c b/gcc/testsuite/gcc.target/i386/387-ficom-2.c new file mode 100644 index 0000000..4190eba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/387-ficom-2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ia32 } */ +/* { dg-skip-if "" { *-*-* } { "-march=*" } { "-march=i386" } } */ +/* { dg-options "-Os -march=i386 -ffast-math -masm=att" } */ + +#include "387-ficom-1.c" + +/* { dg-final { scan-assembler-times "ficomps" 3 } } */ +/* { dg-final { scan-assembler-times "ficompl" 3 } } */ |