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author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2016-08-11 21:39:49 +0000 |
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committer | William Schmidt <wschmidt@gcc.gnu.org> | 2016-08-11 21:39:49 +0000 |
commit | 06f9caede29980be5ef9fc38645dc2da0033b40f (patch) | |
tree | 55b2c83cf43a4a1e892367968bebbfa3f896a01e | |
parent | 3d0fa95d5c3c8826c9bc5ce746b220aa36581afb (diff) | |
download | gcc-06f9caede29980be5ef9fc38645dc2da0033b40f.zip gcc-06f9caede29980be5ef9fc38645dc2da0033b40f.tar.gz gcc-06f9caede29980be5ef9fc38645dc2da0033b40f.tar.bz2 |
re PR target/72863 (Powerpc64le: redundant swaps when using vec_vsx_ld/st)
[gcc]
2016-08-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/72863
* vsx.md (vsx_load_<mode>): For P8LE, emit swaps at expand time.
(vsx_store_<mode>): Likewise.
[gcc/testsuite]
2016-08-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/72863
* gcc.target/powerpc/pr72863.c: New test.
From-SVN: r239394
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/rs6000/vsx.md | 18 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr72863.c | 27 |
4 files changed, 54 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 97c99c7..3361333 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-08-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/72863 + * vsx.md (vsx_load_<mode>): For P8LE, emit swaps at expand time. + (vsx_store_<mode>): Likewise. + 2015-08-11 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386.c (timode_scalar_to_vector_candidate_p): Allow diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 1896de9..f43a28e 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -934,13 +934,27 @@ [(set (match_operand:VSX_M 0 "vsx_register_operand" "") (match_operand:VSX_M 1 "memory_operand" ""))] "VECTOR_MEM_VSX_P (<MODE>mode)" - "") +{ + /* Expand to swaps if needed, prior to swap optimization. */ + if (!BYTES_BIG_ENDIAN && !TARGET_P9_VECTOR) + { + rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode); + DONE; + } +}) (define_expand "vsx_store_<mode>" [(set (match_operand:VSX_M 0 "memory_operand" "") (match_operand:VSX_M 1 "vsx_register_operand" ""))] "VECTOR_MEM_VSX_P (<MODE>mode)" - "") +{ + /* Expand to swaps if needed, prior to swap optimization. */ + if (!BYTES_BIG_ENDIAN && !TARGET_P9_VECTOR) + { + rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode); + DONE; + } +}) ;; Explicit load/store expanders for the builtin functions for lxvd2x, etc., ;; when you really want their element-reversing behavior. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 32b2b87..26fe157 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-08-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/72863 + * gcc.target/powerpc/pr72863.c: New test. + 2016-08-11 Uros Bizjak <ubizjak@gmail.com> * g++.dg/cpp1z/constexpr-lambda6.C: Remove dg-do run. diff --git a/gcc/testsuite/gcc.target/powerpc/pr72863.c b/gcc/testsuite/gcc.target/powerpc/pr72863.c new file mode 100644 index 0000000..26328f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr72863.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "lxvd2x" } } */ +/* { dg-final { scan-assembler "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +#include <altivec.h> + +extern unsigned char *src, *dst; + +void b(void) +{ + int i; + + unsigned char *s8 = src; + unsigned char *d8 = dst; + + for (i = 0; i < 100; i++) { + vector unsigned char vs = vec_vsx_ld(0, s8); + vector unsigned char vd = vec_vsx_ld(0, d8); + vector unsigned char vr = vec_xor(vs, vd); + vec_vsx_st(vr, 0, d8); + s8 += 16; + d8 += 16; + } +} |