p8vector-builtin-3.c: Add vec_pack test.

gcc/testsuite/ChangeLog:

2018-06-08  Carl Love  <cel@us.ibm.com>

 	* gcc.target/powerpc/p8vector-builtin-3.c: Add vec_pack test. Update
	vpkudum counts.
 	* gcc.target/powerpc/p9-extract-3.c: Make second argument of
	vec_extract a signed int.
 	* gcc.target/powerpc/vec-cmp.c: Add vec_cmple, vec_cmpge tests. Update,
	vcmpgtsb, vcmpgtub, vcmpgtsh, vcmpgtuh, vcmpgtsw, vcmpgtsw, vcmpgtuw,
	vcmpgtsd, vcmpgtud.
	* gcc.target/powerpc/vsx-extract-4.c: Make second argument of
	vec_extract a signed int.
	* gcc.target/powerpc/vsx-extract-5.c: Make second argument of
	vec_extract a signed int.
 	* gcc.target/powerpc/vsx-vector-7.c (foo): Add tests for vec_sel and
	vec_xor builtins.  Update xxsel, xxlxor counts.

From-SVN: r261347

7 files changed, 292 insertions, 48 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 682c67b..20ac7c8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,19 @@
+2018-06-08  Carl Love  <cel@us.ibm.com>
+
+ 	* gcc.target/powerpc/p8vector-builtin-3.c: Add vec_pack test. Update
+	vpkudum counts.
+ 	* gcc.target/powerpc/p9-extract-3.c: Make second argument of
+	vec_extract a signed int.
+ 	* gcc.target/powerpc/vec-cmp.c: Add vec_cmple, vec_cmpge tests. Update,
+	vcmpgtsb, vcmpgtub, vcmpgtsh, vcmpgtuh, vcmpgtsw, vcmpgtsw, vcmpgtuw,
+	vcmpgtsd, vcmpgtud.
+	* gcc.target/powerpc/vsx-extract-4.c: Make second argument of
+	vec_extract a signed int.
+	* gcc.target/powerpc/vsx-extract-5.c: Make second argument of
+	vec_extract a signed int.
+ 	* gcc.target/powerpc/vsx-vector-7.c (foo): Add tests for vec_sel and
+	vec_xor builtins.  Update xxsel, xxlxor counts.
+
 2018-06-08  Steven G. Kargl  <kargl@gcc.gnu.org>
 
 	PR fortran/86059 
diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c
index ff50a9a..56ba6c7 100644
--- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c
@@ -33,7 +33,12 @@ vi_sign vi_pack_2 (vll_sign a, vll_sign b)
   return vec_pack (a, b);
 }
 
-vi_sign vi_pack_3 (vll_sign a, vll_sign b)
+vi_uns vi_pack_3 (vll_uns a, vll_uns b)
+{
+  return vec_pack (a, b);
+}
+
+vi_sign vi_pack_4 (vll_sign a, vll_sign b)
 {
   return vec_vpkudum (a, b);
 }
@@ -98,7 +103,7 @@ vll_sign vll_unpack_lo_3 (vi_sign a)
   return vec_vupklsw (a);
 }
 
-/* { dg-final { scan-assembler-times "vpkudum" 3 } } */
+/* { dg-final { scan-assembler-times "vpkudum" 4 } } */
 /* { dg-final { scan-assembler-times "vpkuwum" 3 } } */
 /* { dg-final { scan-assembler-times "vpkuhum" 3 } } */
 /* { dg-final { scan-assembler-times "vupklsw" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c
index 90b3eae..68a0cda 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c
@@ -14,84 +14,96 @@
 double
 fpcvt_int_0 (vector int a)
 {
-  int b = vec_extract (a, 0);
+  int c = 0;
+  int b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_int_3 (vector int a)
 {
-  int b = vec_extract (a, 3);
+  int c = 3;
+  int b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_uint_0 (vector unsigned int a)
 {
-  unsigned int b = vec_extract (a, 0);
+  int c = 0;
+  unsigned int b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_uint_3 (vector unsigned int a)
 {
-  unsigned int b = vec_extract (a, 3);
+  int c = 3;
+  unsigned int b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_short_0 (vector short a)
 {
-  short b = vec_extract (a, 0);
+  int c = 0;
+  short b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_short_7 (vector short a)
 {
-  short b = vec_extract (a, 7);
+  int c = 7;
+  short b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_ushort_0 (vector unsigned short a)
 {
-  unsigned short b = vec_extract (a, 0);
+  int c = 0;
+  unsigned short b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_ushort_7 (vector unsigned short a)
 {
-  unsigned short b = vec_extract (a, 7);
+  int c = 7;
+  unsigned short b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_schar_0 (vector signed char a)
 {
-  signed char b = vec_extract (a, 0);
+  int c = 0;
+  signed char b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_schar_15 (vector signed char a)
 {
-  signed char b = vec_extract (a, 15);
+  int c = 15;
+  signed char b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_uchar_0 (vector unsigned char a)
 {
-  unsigned char b = vec_extract (a, 0);
+  int c = 0;
+  unsigned char b = vec_extract (a, c);
   return (double)b;
 }
 
 double
 fpcvt_uchar_15 (vector unsigned char a)
 {
-  signed char b = vec_extract (a, 15);
+  int c = 15;
+  signed char b = vec_extract (a, c);
   return (double)b;
 }
 
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c
index aee659d..50b00a1 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c
@@ -3,14 +3,14 @@
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc64*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
 /* { dg-options "-O2 -mcpu=power8" } */
-/* { dg-final { scan-assembler-times "vcmpgtsb" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtub" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtsh" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtuh" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtsw" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtuw" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtsd" 2 } } */
-/* { dg-final { scan-assembler-times "vcmpgtud" 2 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsb" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtub" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsh" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuh" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtuw" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtsd" 4 } } */
+/* { dg-final { scan-assembler-times "vcmpgtud" 4 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 16 } } */
 
 #include <altivec.h>
@@ -63,6 +63,18 @@ cmple_ul (vector unsigned long long x, vector unsigned long long y)
   return vec_cmple (x, y);
 }
 
+vector bool int
+cmple_f (vector float x, vector float y)
+{
+  return vec_cmple (x, y);
+}
+
+vector bool long long int
+cmple_d (vector double x, vector double y)
+{
+  return vec_cmple (x, y);
+}
+
 vector bool char
 cmpge_sc (vector signed char x, vector signed char y)
 {
@@ -111,3 +123,134 @@ cmpge_ul (vector unsigned long long x, vector unsigned long long y)
   return vec_cmpge (x, y);
 }
 
+vector bool int
+cmpge_f (vector float x, vector float y)
+{
+  return vec_cmpge (x, y);
+}
+
+vector bool long long int
+cmpge_d (vector double x, vector double y)
+{
+  return vec_cmpge (x, y);
+}
+
+vector bool int
+cmpgt_ui (vector unsigned int x, vector unsigned int y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool int
+cmpgt_f (vector float x, vector float y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool long long int
+cmpgt_d (vector double x, vector double y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool long long
+cmpgt_sl (vector signed long long x, vector signed long long y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool long long
+cmpgt_ul (vector unsigned long long x, vector unsigned long long y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool char
+cmpgt_sc (vector signed char x, vector signed char y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool char
+cmpgt_uc (vector unsigned char x, vector unsigned char y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool short
+cmpgt_ss (vector signed short x, vector signed short y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool short
+cmpgt_us (vector unsigned short x, vector unsigned short y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool int
+cmpgt_si (vector signed int x, vector signed int y)
+{
+  return vec_cmpgt (x, y);
+}
+
+vector bool int
+cmplt_ui (vector unsigned int x, vector unsigned int y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool int
+cmplt_f (vector float x, vector float y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool long long int
+cmplt_d (vector double x, vector double y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool long long
+cmplt_sl (vector signed long long x, vector signed long long y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool long long
+cmplt_ul (vector unsigned long long x, vector unsigned long long y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool char
+cmplt_sc (vector signed char x, vector signed char y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool char
+cmplt_uc (vector unsigned char x, vector unsigned char y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool short
+cmplt_ss (vector signed short x, vector signed short y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool short
+cmplt_us (vector unsigned short x, vector unsigned short y)
+{
+  return vec_cmplt (x, y);
+}
+
+vector bool int
+cmplt_si (vector signed int x, vector signed int y)
+{
+  return vec_cmplt (x, y);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c
index 2e14581..bf315dc 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c
@@ -22,55 +22,63 @@
 TYPE
 foo_0s (vector int v)
 {
-  int i = vec_extract (v, 0);
+  int c = 0;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_1s (vector int v)
 {
-  int i = vec_extract (v, 1);
+  int c = 1;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_2s (vector int v)
 {
-  int i = vec_extract (v, 2);
+  int c = 2;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_3s (vector int v)
 {
-  int i = vec_extract (v, 3);
+  int c = 3;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_0u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 0);
+  int c = 0;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
 
 TYPE
 foo_1u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 1);
+  int c = 1;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
 
 TYPE
 foo_2u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 2);
+  int c = 2;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
 
 TYPE
 foo_3u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 3);
+  int c = 3;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c
index 7b0d809..5f844be 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c
@@ -23,55 +23,63 @@
 TYPE
 foo_0s (vector int v)
 {
-  int i = vec_extract (v, 0);
+  int c = 0;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_1s (vector int v)
 {
-  int i = vec_extract (v, 1);
+  int c = 1;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_2s (vector int v)
 {
-  int i = vec_extract (v, 2);
+  int c = 2;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_3s (vector int v)
 {
-  int i = vec_extract (v, 3);
+  int c = 3;
+  int i = vec_extract (v, c);
   return (TYPE) i;
 }
 
 TYPE
 foo_0u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 0);
+  int c = 0;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
 
 TYPE
 foo_1u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 1);
+  int c = 1;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
 
 TYPE
 foo_2u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 2);
+  int c = 2;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
 
 TYPE
 foo_3u (vector unsigned int v)
 {
-  unsigned int u = vec_extract (v, 3);
+  int c = 3;
+  unsigned int u = vec_extract (v, c);
   return (TYPE) u;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c
index 7de4172..6032be4 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c
@@ -7,28 +7,80 @@
 /* Test VSX built-ins added for version 1.1 of ELFv2 ABI.  */
 
 vector bool     long long vbla, vblb, vblc;
-vector signed   long long vsla;
-vector unsigned long long vula, vulb, vulc;
+vector bool char vbca, vbcb, vbcc;
+vector bool int vbia, vbib, vbic;
+vector signed char vsca, vscb, vscc;
+vector unsigned char vuca, vucb, vucc;
+vector signed int vsia, vsib, vsic;
+vector unsigned int vuia, vuib, vuic;
+
+vector unsigned long long vulla, vullb, vullc;
+vector signed long long vslla, vsllb, vsllc;
+vector bool long long vblla, vbllb, vbllc;
+vector bool short int vbsia, vbsib, vbsic;
+vector signed short int vssia, vssib, vssic;
+vector unsigned short int vusia, vusib, vusic;
 vector double vda, vdb;
 vector float vfa, vfb;
 
 void foo (vector bool long long *vblr,
-	  vector double *vdr, vector unsigned long long *vulz, vector double *vdz)
+	  vector double *vdr, vector unsigned long long *vullz,
+	  vector double *vdz, vector bool char *vbcz,
+	  vector signed char *vscz, vector unsigned char *vucz,
+	  vector bool int *vbiz, vector int *viz,
+	  vector unsigned int *vuiz, vector signed long long int *vslliz,
+	  vector bool short int *vbsiz, vector signed short int *vssiz,
+	  vector unsigned short int *vusiz, vector float *vfz)
 {
   *vblr++ = vec_andc (vbla, vblb);
-  *vdr++  = vec_double (vsla);
-  *vdr++  = vec_double (vula);
+  *vdr++  = vec_double (vslla);
+  *vdr++  = vec_double (vulla);
+
   *vblr++ = vec_mergeh (vbla, vblb);
   *vblr++ = vec_mergel (vbla, vblb);
   *vblr++ = vec_nor (vbla, vblb);
   *vblr++ = vec_or (vbla, vblb);
   *vblr++ = vec_sel (vbla, vblb, vblc);
-  *vblr++ = vec_sel (vbla, vblb, vulc);
+  *vblr++ = vec_sel (vbla, vblb, vullc);
   *vblr++ = vec_xor (vbla, vblb);
 
-  *vulz++ = vec_sel (vula, vulb, vblc);
+  *vullz++ = vec_sel (vulla, vullb, vbllc);
+  *vullz++ = vec_sel (vulla, vullb, vullc);
+
+  *vdz++ = vec_sel(vda, vdb, vullc);
+
+  *vbcz++ = vec_sel (vbca, vbcb, vbcc);
+  *vbcz++ = vec_sel (vbca, vbcb, vucc);
+  *vbcz++ = vec_xor (vbca, vbcb);
+  *vscz++ = vec_sel (vsca, vscb, vbcc);
+  *vscz++ = vec_sel (vsca, vscb, vucc);
+  *vucz++ = vec_sel (vuca, vucb, vbcc);
+  *vucz++ = vec_sel (vuca, vucb, vucc);
+
+  *vbiz++ = vec_sel (vbia, vbib, vbic);
+  *vbiz++ = vec_sel (vbia, vbib, vuic);
+  *vbiz++ = vec_xor (vbia, vbib);
+  *viz++ = vec_sel (vsia, vsib, vbic);
+  *viz++ = vec_sel (vsia, vsib, vuic);
+  *vuiz++ = vec_sel (vuia, vuib, vbic);
+  *vuiz++ = vec_sel (vuia, vuib, vuic);
+
+  *vslliz++ = vec_sel(vslla, vsllb, vbllc);
+  *vslliz++ = vec_sel(vslla, vsllb, vullc);
+
+  *vssiz++ = vec_sel(vssia, vssib, vbsic);
+  *vssiz++ = vec_sel(vssia, vssib, vusic);
+  *vusiz++ = vec_sel(vusia, vusib, vbsic);
+  *vusiz++ = vec_sel(vusia, vusib, vusic);
+
+  *vbsiz++ = vec_sel (vbsia, vbsib, vbsic);
+  *vbsiz++ = vec_sel (vbsia, vbsib, vusic);
+  *vbsiz++ = vec_xor (vbsia, vbsib);
 
-  *vdz++ = vec_sel(vda, vdb, vulc);
+  *vdz++ = vec_sel (vda, vdb, vbllc);
+  *vfz++ = vec_sel (vfa, vfb, vbic);
+  *vfz++ = vec_sel (vfa, vfb, vuic);
+  *vfz++ = vec_xor (vfa, vfb);
 }
 
 /* { dg-final { scan-assembler-times "xxlandc" 1 } } */
@@ -38,5 +90,5 @@ void foo (vector bool long long *vblr,
 /* { dg-final { scan-assembler-times "xxpermdi .*,.*,.*,0" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 1 } } */
 /* { dg-final { scan-assembler-times "xxlor" 1 } } */
-/* { dg-final { scan-assembler-times "xxsel" 4 } } */
-/* { dg-final { scan-assembler-times "xxlxor" 1 } } */
+/* { dg-final { scan-assembler-times "xxsel" 28 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 5 } } */