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| author | liuhongt <hongtao.liu@intel.com> | 2023-02-08 12:42:27 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-04-23 09:56:06 +0800 |
| commit | 0368d169492017cfab5622d38b15be94154d458c (patch) | |
| tree | 3fcf3a546107467699d2e329abd7a17407c17fc7 | |
| parent | 6ab856aa49bef7c04efa6144a5048e129b3a058b (diff) | |
| download | gcc-0368d169492017cfab5622d38b15be94154d458c.zip gcc-0368d169492017cfab5622d38b15be94154d458c.tar.gz gcc-0368d169492017cfab5622d38b15be94154d458c.tar.bz2 | |
Use NO_REGS in cost calculation when the preferred register class are not known yet.
gcc/ChangeLog:
PR rtl-optimization/108707
* ira-costs.cc (scan_one_insn): Use NO_REGS instead of
GENERAL_REGS when preferred reg_class is not known.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr108707.c: New test.
| -rw-r--r-- | gcc/ira-costs.cc | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr108707.c | 16 |
2 files changed, 20 insertions, 1 deletions
diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc index c0fdef8..d2a801a 100644 --- a/gcc/ira-costs.cc +++ b/gcc/ira-costs.cc @@ -1572,7 +1572,10 @@ scan_one_insn (rtx_insn *insn) && (! ira_use_lra_p || ! pic_offset_table_rtx || ! contains_symbol_ref_p (XEXP (note, 0)))) { - enum reg_class cl = GENERAL_REGS; + /* Costs for NO_REGS are used in cost calculation on the + 1st pass when the preferred register classes are not + known yet. In this case we take the best scenario. */ + enum reg_class cl = NO_REGS; rtx reg = SET_DEST (set); int num = COST_INDEX (REGNO (reg)); diff --git a/gcc/testsuite/gcc.target/i386/pr108707.c b/gcc/testsuite/gcc.target/i386/pr108707.c new file mode 100644 index 0000000..6405cfe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr108707.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-not {(?n)vfmadd[1-3]*ps.*\(} { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times {(?n)vfmadd[1-3]*ps[ \t]*} 3 } } */ + +#include<immintrin.h> + +void +foo (__m512 pv, __m512 a, __m512 b, __m512 c, + __m512* pdest, __m512* p1) +{ + __m512 t = *p1; + pdest[0] = _mm512_fmadd_ps (t, pv, a); + pdest[1] = _mm512_fmadd_ps (t, pv, b); + pdest[2] = _mm512_fmadd_ps (t, pv, c); +} |