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authorAlexandre Oliva <aoliva@redhat.com>2007-02-15 04:47:23 +0000
committerAlexandre Oliva <aoliva@gcc.gnu.org>2007-02-15 04:47:23 +0000
commitf4f81a669aec8c59538c9ab4373ae7e58897047f (patch)
treeced52ed6f928fc969f71452ac1b8fc9b41f43ffc
parent45f94ec73059ead706d765e6ab20c081dcc252d3 (diff)
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frv.md (reload_incc, [...]): Remove invalid patterns.
* config/frv/frv.md (reload_incc, reload_outcc, reload_incc_uns, reload_outcc_uns, reload_incc_nz, reload_outcc_nz): Remove invalid patterns. From-SVN: r121981
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/frv/frv.md60
2 files changed, 6 insertions, 60 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5435c48..cff4aef 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
2007-02-15 Alexandre Oliva <aoliva@redhat.com>
+ * config/frv/frv.md (reload_incc, reload_outcc, reload_incc_uns,
+ reload_outcc_uns, reload_incc_nz, reload_outcc_nz): Remove
+ invalid patterns.
+
+2007-02-15 Alexandre Oliva <aoliva@redhat.com>
+
* tree-sra.c (instantiate_missing_elements): Canonicalize
bit-field types.
(sra_build_assignment): New.
diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md
index 43af8c4..d393204 100644
--- a/gcc/config/frv/frv.md
+++ b/gcc/config/frv/frv.md
@@ -2256,26 +2256,6 @@
end_sequence ();
}")
-(define_expand "reload_incc"
- [(parallel [(set (match_operand:CC 2 "integer_register_operand" "=&d")
- (match_operand:CC 1 "memory_operand" "m"))
- (clobber (match_scratch:CC_CCR 3 ""))])
- (parallel [(set (match_operand:CC 0 "icc_operand" "=t")
- (match_dup 2))
- (clobber (match_scratch:CC_CCR 4 ""))])]
- ""
- "")
-
-(define_expand "reload_outcc"
- [(parallel [(set (match_operand:CC 2 "integer_register_operand" "=&d")
- (match_operand:CC 1 "icc_operand" "t"))
- (clobber (match_dup 3))])
- (parallel [(set (match_operand:CC 0 "memory_operand" "=m")
- (match_dup 2))
- (clobber (match_scratch:CC_CCR 4 ""))])]
- ""
- "operands[3] = gen_rtx_REG (CC_CCRmode, ICR_TEMP);")
-
;; Reload CC_UNSmode for unsigned integer comparisons
;; Use define_expand so that cse/gcse/combine can't create movcc_uns insns
@@ -2343,26 +2323,6 @@
end_sequence ();
}")
-(define_expand "reload_incc_uns"
- [(parallel [(set (match_operand:CC_UNS 2 "integer_register_operand" "=&d")
- (match_operand:CC_UNS 1 "memory_operand" "m"))
- (clobber (match_scratch:CC_CCR 3 ""))])
- (parallel [(set (match_operand:CC_UNS 0 "icc_operand" "=t")
- (match_dup 2))
- (clobber (match_scratch:CC_CCR 4 ""))])]
- ""
- "")
-
-(define_expand "reload_outcc_uns"
- [(parallel [(set (match_operand:CC_UNS 2 "integer_register_operand" "=&d")
- (match_operand:CC_UNS 1 "icc_operand" "t"))
- (clobber (match_dup 3))])
- (parallel [(set (match_operand:CC_UNS 0 "memory_operand" "=m")
- (match_dup 2))
- (clobber (match_scratch:CC_CCR 4 ""))])]
- ""
- "operands[3] = gen_rtx_REG (CC_CCRmode, ICR_TEMP);")
-
;; Reload CC_NZmode. This is mostly the same as the CCmode and CC_UNSmode
;; handling, but it uses different sequences for moving between GPRs and ICCs.
@@ -2423,26 +2383,6 @@
(set (match_dup 3) (const_int 0)))]
"operands[3] = simplify_gen_subreg (SImode, operands[0], CC_NZmode, 0);")
-(define_expand "reload_incc_nz"
- [(parallel [(set (match_operand:CC_NZ 2 "integer_register_operand" "=&d")
- (match_operand:CC_NZ 1 "memory_operand" "m"))
- (clobber (match_scratch:CC_CCR 3 ""))])
- (parallel [(set (match_operand:CC_NZ 0 "icc_operand" "=t")
- (match_dup 2))
- (clobber (match_scratch:CC_CCR 4 ""))])]
- ""
- "")
-
-(define_expand "reload_outcc_nz"
- [(parallel [(set (match_operand:CC_NZ 2 "integer_register_operand" "=&d")
- (match_operand:CC_NZ 1 "icc_operand" "t"))
- (clobber (match_dup 3))])
- (parallel [(set (match_operand:CC_NZ 0 "memory_operand" "=m")
- (match_dup 2))
- (clobber (match_scratch:CC_CCR 4 ""))])]
- ""
- "operands[3] = gen_rtx_REG (CC_CCRmode, ICR_TEMP);")
-
;; Reload CC_FPmode for floating point comparisons
;; We use a define_expand here so that cse/gcse/combine can't accidentally
;; create movcc insns. If this was a named define_insn, we would not be able