aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorDavid S. Miller <davem@redhat.com>2002-04-09 07:52:03 -0700
committerDavid S. Miller <davem@gcc.gnu.org>2002-04-09 07:52:03 -0700
commitf451b552cf66fe7b121908e7557a9ffc384bdbfb (patch)
treeefa0a6f3d5c2bc42fc719890f937e9b7962f8061
parentcd6af0c13a345daa0d71484864072b26363d0523 (diff)
downloadgcc-f451b552cf66fe7b121908e7557a9ffc384bdbfb.zip
gcc-f451b552cf66fe7b121908e7557a9ffc384bdbfb.tar.gz
gcc-f451b552cf66fe7b121908e7557a9ffc384bdbfb.tar.bz2
sparc.c (sparc_extra_constraint_check): New function, implementing EXTRA_CONSTRAINTS.
2002-04-09 David S. Miller <davem@redhat.com> * config/sparc/sparc.c (sparc_extra_constraint_check): New function, implementing EXTRA_CONSTRAINTS. For memory constraints, allow reloading pseudos. * config/sparc/sparc.h (EXTRA_CONSTRAINTS): Use it. * config/sparc/sparc-protos.h: Declare it. * config/sparc/sparc.c (const64_is_2insns): Kill signed vs. unsigned comparison warning. (output_restore_regs): Mark leaf_function as unused. From-SVN: r52080
-rw-r--r--gcc/ChangeLog12
-rw-r--r--gcc/config/sparc/sparc-protos.h1
-rw-r--r--gcc/config/sparc/sparc.c66
-rw-r--r--gcc/config/sparc/sparc.h41
4 files changed, 86 insertions, 34 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b38c09a..c8dbbaf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2002-04-09 David S. Miller <davem@redhat.com>
+
+ * config/sparc/sparc.c (sparc_extra_constraint_check): New
+ function, implementing EXTRA_CONSTRAINTS. For memory constraints,
+ allow reloading pseudos.
+ * config/sparc/sparc.h (EXTRA_CONSTRAINTS): Use it.
+ * config/sparc/sparc-protos.h: Declare it.
+
+ * config/sparc/sparc.c (const64_is_2insns): Kill signed vs.
+ unsigned comparison warning.
+ (output_restore_regs): Mark leaf_function as unused.
+
Tue Apr 9 09:35:45 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* expr.c (is_aligning_offset): New function.
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 0f3cef4..27359df 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -117,6 +117,7 @@ extern char *sparc_v8plus_shift PARAMS ((rtx *, rtx, const char *));
32 bits of REG are 0 before INSN. */
extern int sparc_check_64 PARAMS ((rtx, rtx));
extern rtx gen_df_reg PARAMS ((rtx, int));
+extern int sparc_extra_constraint_check PARAMS ((rtx, char, int));
#endif /* RTX_CODE */
#endif /* __SPARC_PROTOS_H__ */
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 2977837..f7c28a7 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1861,7 +1861,7 @@ const64_is_2insns (high_bits, low_bits)
int highest_bit_set, lowest_bit_set, all_bits_between_are_set;
if (high_bits == 0
- || high_bits == -1)
+ || high_bits == 0xffffffff)
return 1;
analyze_64bit_constant (high_bits, low_bits,
@@ -3647,7 +3647,7 @@ sparc_nonflat_function_prologue (file, size, leaf_function)
static void
output_restore_regs (file, leaf_function)
FILE *file;
- int leaf_function;
+ int leaf_function ATTRIBUTE_UNUSED;
{
int offset, n_regs;
const char *base;
@@ -8609,3 +8609,65 @@ sparc_elf_asm_named_section (name, flags)
fputc ('\n', asm_out_file);
}
#endif /* OBJECT_FORMAT_ELF */
+
+int
+sparc_extra_constraint_check (op, c, strict)
+ rtx op;
+ char c;
+ int strict;
+{
+ int reload_ok_mem;
+
+ if (TARGET_ARCH64
+ && (c == 'T' || c == 'U'))
+ return 0;
+
+ switch (c)
+ {
+ case 'Q':
+ return fp_sethi_p (op);
+
+ case 'R':
+ return fp_mov_p (op);
+
+ case 'S':
+ return fp_high_losum_p (op);
+
+ case 'U':
+ if (! strict
+ || (GET_CODE (op) == REG
+ && (REGNO (op) < FIRST_PSEUDO_REGISTER
+ || reg_renumber[REGNO (op)] >= 0)))
+ return register_ok_for_ldd (op);
+
+ return 0;
+
+ case 'W':
+ case 'T':
+ break;
+
+ default:
+ return 0;
+ }
+
+ /* Our memory extra constraints have to emulate the
+ behavior of 'm' and 'o' in order for reload to work
+ correctly. */
+ if (GET_CODE (op) == MEM)
+ {
+ reload_ok_mem = 0;
+ if ((TARGET_ARCH64 || mem_min_alignment (op, 8))
+ && (! strict
+ || strict_memory_address_p (Pmode, XEXP (op, 0))))
+ reload_ok_mem = 1;
+ }
+ else
+ {
+ reload_ok_mem = (reload_in_progress
+ && GET_CODE (op) == REG
+ && REGNO (op) >= FIRST_PSEUDO_REGISTER
+ && reg_renumber [REGNO (op)] < 0);
+ }
+
+ return reload_ok_mem;
+}
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index fbbb96c..3ebe626 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -2104,12 +2104,6 @@ do { \
'W' handles the memory operand when moving operands in/out
of 'e' constraint floating point registers. */
-#define EXTRA_CONSTRAINT_BASE(OP, C) \
- ((C) == 'Q' ? fp_sethi_p(OP) \
- : (C) == 'R' ? fp_mov_p(OP) \
- : (C) == 'S' ? fp_high_losum_p(OP) \
- : 0)
-
#ifndef REG_OK_STRICT
/* Nonzero if X is a hard reg that can be used as an index
@@ -2124,18 +2118,13 @@ do { \
#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X)
/* 'T', 'U' are for aligned memory loads which aren't needed for arch64.
- 'W' is like 'T' but is assumed true on arch64. */
-
-#define EXTRA_CONSTRAINT(OP, C) \
- (EXTRA_CONSTRAINT_BASE(OP, C) \
- || ((! TARGET_ARCH64 && (C) == 'T') \
- ? (mem_min_alignment (OP, 8)) \
- : ((! TARGET_ARCH64 && (C) == 'U') \
- ? (register_ok_for_ldd (OP)) \
- : ((C) == 'W' \
- ? ((TARGET_ARCH64 && GET_CODE (OP) == MEM) \
- || mem_min_alignment (OP, 8)) \
- : 0))))
+ 'W' is like 'T' but is assumed true on arch64.
+
+ Remember to accept pseudo-registers for memory constraints if reload is
+ in progress. */
+
+#define EXTRA_CONSTRAINT(OP, C) \
+ sparc_extra_constraint_check(OP, C, 0)
#else
@@ -2144,20 +2133,8 @@ do { \
/* Nonzero if X is a hard reg that can be used as a base reg. */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
-#define EXTRA_CONSTRAINT(OP, C) \
- (EXTRA_CONSTRAINT_BASE(OP, C) \
- || ((! TARGET_ARCH64 && (C) == 'T') \
- ? mem_min_alignment (OP, 8) && strict_memory_address_p (Pmode, XEXP (OP, 0)) \
- : ((! TARGET_ARCH64 && (C) == 'U') \
- ? (GET_CODE (OP) == REG \
- && (REGNO (OP) < FIRST_PSEUDO_REGISTER \
- || reg_renumber[REGNO (OP)] >= 0) \
- && register_ok_for_ldd (OP)) \
- : ((C) == 'W' \
- ? (((TARGET_ARCH64 && GET_CODE (OP) == MEM) \
- || mem_min_alignment (OP, 8)) \
- && strict_memory_address_p (Pmode, XEXP (OP, 0))) \
- : 0))))
+#define EXTRA_CONSTRAINT(OP, C) \
+ sparc_extra_constraint_check(OP, C, 1)
#endif