diff options
| author | Prachi Godbole <prachi.godbole@imgtec.com> | 2017-03-06 10:32:47 +0000 |
|---|---|---|
| committer | Prachi Godbole <prachigodbole@gcc.gnu.org> | 2017-03-06 10:32:47 +0000 |
| commit | c1b993c0a669dd73e6b4914936699a247e68a48f (patch) | |
| tree | b8f19bb0b6846d0d567bec9996b59b519e036a90 | |
| parent | a50a32aa3cbd139b2fbc56bcd80a82dc7f6ca5e5 (diff) | |
| download | gcc-c1b993c0a669dd73e6b4914936699a247e68a48f.zip gcc-c1b993c0a669dd73e6b4914936699a247e68a48f.tar.gz gcc-c1b993c0a669dd73e6b4914936699a247e68a48f.tar.bz2 | |
mips-msa.md (msa_fmax_a_<msafmt>, [...]): Introduce mode interator for if_then_else.
gcc/
* config/mips/mips-msa.md (msa_fmax_a_<msafmt>, msa_fmin_a_<msafmt>,
msa_max_a_<msafmt>, msa_min_a_<msafmt>): Introduce mode interator for
if_then_else.
(smin<mode>3, smax<mode>3): Change operand print code from 'B' to 'E'.
gcc/testsuite/
* gcc.target/mips/msa-minmax.c: New tests.
From-SVN: r245913
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/mips-msa.md | 12 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msa-minmax.c | 38 |
4 files changed, 55 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 35f5288..5fbe9ef 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-03-06 Prachi Godbole <prachi.godbole@imgtec.com> + + * config/mips/mips-msa.md (msa_fmax_a_<msafmt>, msa_fmin_a_<msafmt>, + msa_max_a_<msafmt>, msa_min_a_<msafmt>): Introduce mode interator for + if_then_else. + (smin<mode>3, smax<mode>3): Change operand print code from 'B' to 'E'. + 2017-03-06 Martin Liska <mliska@suse.cz> PR sanitize/79783 diff --git a/gcc/config/mips/mips-msa.md b/gcc/config/mips/mips-msa.md index 521b094..accb8de 100644 --- a/gcc/config/mips/mips-msa.md +++ b/gcc/config/mips/mips-msa.md @@ -1688,7 +1688,7 @@ (define_insn "msa_fmax_a_<msafmt>" [(set (match_operand:FMSA 0 "register_operand" "=f") - (if_then_else + (if_then_else:FMSA (gt (abs:FMSA (match_operand:FMSA 1 "register_operand" "f")) (abs:FMSA (match_operand:FMSA 2 "register_operand" "f"))) (match_dup 1) @@ -1709,7 +1709,7 @@ (define_insn "msa_fmin_a_<msafmt>" [(set (match_operand:FMSA 0 "register_operand" "=f") - (if_then_else + (if_then_else:FMSA (lt (abs:FMSA (match_operand:FMSA 1 "register_operand" "f")) (abs:FMSA (match_operand:FMSA 2 "register_operand" "f"))) (match_dup 1) @@ -2174,7 +2174,7 @@ (define_insn "msa_max_a_<msafmt>" [(set (match_operand:IMSA 0 "register_operand" "=f") - (if_then_else + (if_then_else:IMSA (gt (abs:IMSA (match_operand:IMSA 1 "register_operand" "f")) (abs:IMSA (match_operand:IMSA 2 "register_operand" "f"))) (match_dup 1) @@ -2191,7 +2191,7 @@ "ISA_HAS_MSA" "@ max_s.<msafmt>\t%w0,%w1,%w2 - maxi_s.<msafmt>\t%w0,%w1,%B2" + maxi_s.<msafmt>\t%w0,%w1,%E2" [(set_attr "type" "simd_int_arith") (set_attr "mode" "<MODE>")]) @@ -2208,7 +2208,7 @@ (define_insn "msa_min_a_<msafmt>" [(set (match_operand:IMSA 0 "register_operand" "=f") - (if_then_else + (if_then_else:IMSA (lt (abs:IMSA (match_operand:IMSA 1 "register_operand" "f")) (abs:IMSA (match_operand:IMSA 2 "register_operand" "f"))) (match_dup 1) @@ -2225,7 +2225,7 @@ "ISA_HAS_MSA" "@ min_s.<msafmt>\t%w0,%w1,%w2 - mini_s.<msafmt>\t%w0,%w1,%B2" + mini_s.<msafmt>\t%w0,%w1,%E2" [(set_attr "type" "simd_int_arith") (set_attr "mode" "<MODE>")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 83e7a99..4850fe5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-03-06 Prachi Godbole <prachi.godbole@imgtec.com> + + * gcc.target/mips/msa-minmax.c: New tests. + 2017-03-06 Martin Liska <mliska@suse.cz> PR sanitize/79783 diff --git a/gcc/testsuite/gcc.target/mips/msa-minmax.c b/gcc/testsuite/gcc.target/mips/msa-minmax.c new file mode 100644 index 0000000..72cfdac --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msa-minmax.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */ + +typedef int v4i32 __attribute__ ((vector_size(16))); +typedef float v4f32 __attribute__ ((vector_size(16))); + +/* Test MSA signed min/max immediate for correct assembly output. */ + +void +min_s_msa (v4i32 *vx, v4i32 *vy) +{ + *vy = __builtin_msa_mini_s_w (*vx, -15); +} +/* { dg-final { scan-assembler "-15" } } */ + +void +max_s_msa (v4i32 *vx, v4i32 *vy) +{ + *vy = __builtin_msa_maxi_s_w (*vx, -15); +} +/* { dg-final { scan-assembler "-15" } } */ + +/* Test MSA min_a/max_a instructions for forward propagation optimization. */ + +#define FUNC(NAME, TYPE, RETTYPE) RETTYPE NAME##_a_msa (TYPE *vx, TYPE *vy) \ +{ \ + TYPE dest = __builtin_msa_##NAME##_a_w (*vx, *vy); \ + return dest[0]; \ +} + +FUNC(fmin, v4f32, float) +/* { dg-final { scan-assembler "fmin_a.w" } } */ +FUNC(fmax, v4f32, float) +/* { dg-final { scan-assembler "fmax_a.w" } } */ +FUNC(min, v4i32, int) +/* { dg-final { scan-assembler "min_a.w" } } */ +FUNC(max, v4i32, int) +/* { dg-final { scan-assembler "max_a.w" } } */ |