dsp16xxx.c: Include ggc.h

	* dsp16xxx.c: Include ggc.h
	(override_options): Mark GC roots.
	* mn10200.c: Include ggc.h.
	(asm_file_start): Mark GC roots.
	* tahoe.c: Include ggc.h.
	(extensible_operand): Mark GC roots.

From-SVN: r29187

4 files changed, 44 insertions, 2 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 28ff25d..4f2adb4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+Tue Sep  7 23:31:53 1999  Mark Mitchell  <mark@codesourcery.com>
+
+	* dsp16xxx.c: Include ggc.h
+	(override_options): Mark GC roots.
+	* mn10200.c: Include ggc.h.
+	(asm_file_start): Mark GC roots.
+	* tahoe.c: Include ggc.h.
+	(extensible_operand): Mark GC roots.
+
 Tue Sep  7 23:23:15 1999  Linas Vepstas  <linas@linas.org>
 
 	* README: Add section discussing status of ELF ABI.
diff --git a/gcc/config/dsp16xx/dsp16xx.c b/gcc/config/dsp16xx/dsp16xx.c
index cac77af..b249c07 100644
--- a/gcc/config/dsp16xx/dsp16xx.c
+++ b/gcc/config/dsp16xx/dsp16xx.c
@@ -35,6 +35,7 @@ Boston, MA 02111-1307, USA.  */
 #include "expr.h"
 #include "function.h"
 #include "flags.h"
+#include "ggc.h"
 
 char *text_seg_name;
 char *rsect_text;
@@ -1529,8 +1530,33 @@ override_options ()
 	  flag_inline_functions = 1;
 	}
     }
+
+  /* Mark our global variables for GC.  */
+  ggc_add_rtx (&dsp16xx_addhf3_libcall, 1);
+  ggc_add_rtx (dsp16xx_addhf3_libcall, 1);
+  ggc_add_rtx (dsp16xx_subhf3_libcall, 1);
+  ggc_add_rtx (dsp16xx_mulhf3_libcall, 1);
+  ggc_add_rtx (dsp16xx_divhf3_libcall, 1);
+  ggc_add_rtx (dsp16xx_cmphf3_libcall, 1);
+  ggc_add_rtx (dsp16xx_fixhfhi2_libcall, 1);
+  ggc_add_rtx (dsp16xx_floathihf2_libcall, 1);
+  ggc_add_rtx (dsp16xx_neghf2_libcall, 1);
+  ggc_add_rtx (dsp16xx_mulhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_udivqi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_udivhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_divqi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_divhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_modqi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_modhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_umodqi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_umodhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_ashrhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_ashlhi3_libcall, 1);
+  ggc_add_rtx (dsp16xx_ucmphi2_libcall, 1);
+  ggc_add_rtx (dsp16xx_lshrhi3_libcall, 1);
 }
 
+
 enum rtx_code
 next_cc_user_code (insn)
 rtx insn;
diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c
index cda180a..a74e6b6 100644
--- a/gcc/config/mn10200/mn10200.c
+++ b/gcc/config/mn10200/mn10200.c
@@ -36,6 +36,7 @@ Boston, MA 02111-1307, USA.  */
 #include "expr.h"
 #include "function.h"
 #include "obstack.h"
+#include "ggc.h"
 
 /* Global registers known to hold the value zero.
 
@@ -72,6 +73,8 @@ asm_file_start (file)
   else
     fprintf (file, "\n\n");
   output_file_directive (file, main_input_filename);
+  ggc_add_rtx (&zero_dreg, 1);
+  ggc_add_rtx (&zero_areg, 1);
 }
 
 /* Print operand X using operand code CODE to assembly language output file
diff --git a/gcc/config/tahoe/tahoe.c b/gcc/config/tahoe/tahoe.c
index 89cdc3d..8ad8bef 100644
--- a/gcc/config/tahoe/tahoe.c
+++ b/gcc/config/tahoe/tahoe.c
@@ -35,6 +35,7 @@ Boston, MA 02111-1307, USA.  */
 #include "function.h"
 #include "output.h"
 #include "insn-attr.h"
+#include "ggc.h"
 
 /* On tahoe, you have to go to memory to convert a register
    from sub-word to word.  */
@@ -50,8 +51,11 @@ extensible_operand (op, mode)
        || (GET_CODE (op) == SUBREG
 	   && GET_CODE (SUBREG_REG (op)) == REG))
       && tahoe_reg_conversion_loc == 0)
-    tahoe_reg_conversion_loc
-      = assign_stack_local (SImode, GET_MODE_SIZE (SImode));
+    {
+      tahoe_reg_conversion_loc
+	= assign_stack_local (SImode, GET_MODE_SIZE (SImode));
+      ggc_add_rtx_root (&tahoe_reg_conversion_loc, 1);
+    }
 
   return general_operand (op, mode);
 }