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author | Will Schmidt <will_schmidt@vnet.ibm.com> | 2018-06-12 15:57:48 +0000 |
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committer | Will Schmidt <willschm@gcc.gnu.org> | 2018-06-12 15:57:48 +0000 |
commit | 965fa640e8492d152af80d5f5413563dee63df10 (patch) | |
tree | 27ce6dfbc587dd5873e5fb7d7e1acddce680be16 | |
parent | 0343162b10ebc907150d30adc076a36f96d9bcd4 (diff) | |
download | gcc-965fa640e8492d152af80d5f5413563dee63df10.zip gcc-965fa640e8492d152af80d5f5413563dee63df10.tar.gz gcc-965fa640e8492d152af80d5f5413563dee63df10.tar.bz2 |
fold-vec-load-vec_vsx_ld-char.c: New.
[testsuite]
2018-05-31 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-load-vec_vsx_ld-char.c: New.
* gcc.target/powerpc/fold-vec-load-vec_vsx_ld-double.c: New.
* gcc.target/powerpc/fold-vec-load-vec_vsx_ld-float.c: New.
* gcc.target/powerpc/fold-vec-load-vec_vsx_ld-int.c: New.
* gcc.target/powerpc/fold-vec-load-vec_vsx_ld-longlong.c: New.
* gcc.target/powerpc/fold-vec-load-vec_vsx_ld-short.c: New.
From-SVN: r261505
7 files changed, 222 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8023c75..0b09953 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,14 @@ 2018-06-12 Will Schmidt <will_schmidt@vnet.ibm.com> + * gcc.target/powerpc/fold-vec-load-vec_vsx_ld-char.c: New. + * gcc.target/powerpc/fold-vec-load-vec_vsx_ld-double.c: New. + * gcc.target/powerpc/fold-vec-load-vec_vsx_ld-float.c: New. + * gcc.target/powerpc/fold-vec-load-vec_vsx_ld-int.c: New. + * gcc.target/powerpc/fold-vec-load-vec_vsx_ld-longlong.c: New. + * gcc.target/powerpc/fold-vec-load-vec_vsx_ld-short.c: New. + +2018-06-12 Will Schmidt <will_schmidt@vnet.ibm.com> + * gcc.target/powerpc/fold-vec-load-builtin_vec_xl-char.c: New. * gcc.target/powerpc/fold-vec-load-builtin_vec_xl-double.c: New. * gcc.target/powerpc/fold-vec-load-builtin_vec_xl-float.c: New. diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-char.c new file mode 100644 index 0000000..0b76341 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-char.c @@ -0,0 +1,39 @@ +/* Verify that overloaded built-ins for vec_vsx_ld with char + inputs produce the right code. */ + +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> +#define BUILD_VAR_TEST(TESTNAME1, RETTYPE, VAR_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _var (VAR_OFFSET offset, LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (offset, loadfrom); \ +} + +#define BUILD_CST_TEST(TESTNAME1, RETTYPE, CST_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _cst (LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (CST_OFFSET, loadfrom); \ +} + +BUILD_VAR_TEST( test1, vector signed char, signed long long, signed char); +BUILD_VAR_TEST( test2, vector signed char, signed int, signed char); +BUILD_CST_TEST( test3, vector signed char, 12, signed char); + +BUILD_VAR_TEST( test4, vector unsigned char, signed long long, unsigned char); +BUILD_VAR_TEST( test5, vector unsigned char, signed int, unsigned char); +BUILD_CST_TEST( test6, vector unsigned char, 12, unsigned char); + +BUILD_VAR_TEST( test7, vector signed char, signed long long, vector signed char); +BUILD_VAR_TEST( test8, vector signed char, signed int, vector signed char); +BUILD_CST_TEST( test9, vector signed char, 12, vector signed char); + +BUILD_VAR_TEST( test10, vector unsigned char, signed long long, vector unsigned char); +BUILD_VAR_TEST( test11, vector unsigned char, signed int, vector unsigned char); +BUILD_CST_TEST( test12, vector unsigned char, 12, vector unsigned char); + +/* { dg-final { scan-assembler-times {\mlxvw4x\M|\mlxvd2x\M|\mlxvx\M|\mlvx\M} 12 } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-double.c new file mode 100644 index 0000000..beb6d03 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-double.c @@ -0,0 +1,30 @@ +/* Verify that overloaded built-ins for vec_vsx_ld with double + inputs produce the right code. */ + +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> +#define BUILD_VAR_TEST(TESTNAME1, RETTYPE, VAR_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _var (VAR_OFFSET offset, LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (offset, loadfrom); \ +} + +#define BUILD_CST_TEST(TESTNAME1, RETTYPE, CST_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _cst (LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (CST_OFFSET, loadfrom); \ +} + +BUILD_VAR_TEST( test1, vector double, long long, double); +BUILD_VAR_TEST( test2, vector double, int, double); +BUILD_CST_TEST( test3, vector double, 12, double); + +BUILD_VAR_TEST( test4, vector double, int, vector double); +BUILD_VAR_TEST( test5, vector double, long long, vector double); +BUILD_CST_TEST( test6, vector double, 12, vector double); + +/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxvx\M|\mlvx\M} 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-float.c new file mode 100644 index 0000000..5f9b6d3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-float.c @@ -0,0 +1,30 @@ +/* Verify that overloaded built-ins for vec_vsx_ld with float + inputs produce the right code. */ + +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> +#define BUILD_VAR_TEST(TESTNAME1, RETTYPE, VAR_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _var (VAR_OFFSET offset, LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (offset, loadfrom); \ +} + +#define BUILD_CST_TEST(TESTNAME1, RETTYPE, CST_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _cst (LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (CST_OFFSET, loadfrom); \ +} + +BUILD_VAR_TEST( test1, vector float, signed long long, float); +BUILD_VAR_TEST( test3, vector float, signed int, float); +BUILD_CST_TEST( test4, vector float, 12, float); + +BUILD_VAR_TEST( test5, vector float, signed long long, vector float); +BUILD_VAR_TEST( test7, vector float, signed int, vector float); +BUILD_CST_TEST( test8, vector float, 12, vector float); + +/* { dg-final { scan-assembler-times {\mlxvw4x\M|\mlxvd2x\M|\mlxvx\M|\mlvx\M} 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-int.c new file mode 100644 index 0000000..a59f52f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-int.c @@ -0,0 +1,38 @@ +/* Verify that overloaded built-ins for vec_vsx_ld with int + inputs produce the right code. */ + +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> +#define BUILD_VAR_TEST(TESTNAME1, RETTYPE, VAR_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _var (VAR_OFFSET offset, LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (offset, loadfrom); \ +} + +#define BUILD_CST_TEST(TESTNAME1, RETTYPE, CST_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _cst (LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (CST_OFFSET, loadfrom); \ +} + +BUILD_VAR_TEST( test1, vector signed int, signed long long, signed int); +BUILD_VAR_TEST( test2, vector signed int, signed int, signed int); +BUILD_CST_TEST( test3, vector signed int, 12, signed int); + +BUILD_VAR_TEST( test4, vector unsigned int, signed long long, unsigned int); +BUILD_VAR_TEST( test5, vector unsigned int, signed int, unsigned int); +BUILD_CST_TEST( test6, vector unsigned int, 12, unsigned int); + +BUILD_VAR_TEST( test7, vector signed int, signed long long, vector signed int); +BUILD_VAR_TEST( test8, vector signed int, signed int, vector signed int); +BUILD_CST_TEST( test9, vector signed int, 12, vector signed int); + +BUILD_VAR_TEST( test10, vector unsigned int, signed long long, vector unsigned int); +BUILD_VAR_TEST( test11, vector unsigned int, signed int, vector unsigned int); +BUILD_CST_TEST( test12, vector unsigned int, 12, vector unsigned int); + +/* { dg-final { scan-assembler-times {\mlxvw4x\M|\mlxvd2x\M|\mlxvx\M|\mlvx\M} 12 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-longlong.c new file mode 100644 index 0000000..5c121fa --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-longlong.c @@ -0,0 +1,38 @@ +/* Verify that overloaded built-ins for vec_vsx_ld with long long + inputs produce the right code. */ + +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> +#define BUILD_VAR_TEST(TESTNAME1, RETTYPE, VAR_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _var (VAR_OFFSET offset, LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (offset, loadfrom); \ +} + +#define BUILD_CST_TEST(TESTNAME1, RETTYPE, CST_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _cst (LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (CST_OFFSET, loadfrom); \ +} + +BUILD_VAR_TEST( test1, vector signed long long, signed long long, signed long long); +BUILD_VAR_TEST( test2, vector signed long long, signed int, signed long long); +BUILD_CST_TEST( test3, vector signed long long, 12, signed long long); + +BUILD_VAR_TEST( test4, vector unsigned long long, signed long long, unsigned long long); +BUILD_VAR_TEST( test5, vector unsigned long long, signed int, unsigned long long); +BUILD_CST_TEST( test6, vector unsigned long long, 12, unsigned long long); + +BUILD_VAR_TEST( test7, vector signed long long, signed long long, vector signed long long); +BUILD_VAR_TEST( test8, vector signed long long, signed int, vector signed long long); +BUILD_CST_TEST( test9, vector signed long long, 12, vector signed long long); + +BUILD_VAR_TEST( test10, vector unsigned long long, signed long long, vector unsigned long long); +BUILD_VAR_TEST( test11, vector unsigned long long, signed int, vector unsigned long long); +BUILD_CST_TEST( test12, vector unsigned long long, 12, vector unsigned long long); + +/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxvx\M|\mlvx\M} 12 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-short.c new file mode 100644 index 0000000..07154d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-load-vec_vsx_ld-short.c @@ -0,0 +1,38 @@ +/* Verify that overloaded built-ins for vec_vsx_ld with short + inputs produce the right code. */ + +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> +#define BUILD_VAR_TEST(TESTNAME1, RETTYPE, VAR_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _var (VAR_OFFSET offset, LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (offset, loadfrom); \ +} + +#define BUILD_CST_TEST(TESTNAME1, RETTYPE, CST_OFFSET, LOADFROM) \ +RETTYPE \ +TESTNAME1 ## _cst (LOADFROM * loadfrom) \ +{ \ + return vec_vsx_ld (CST_OFFSET, loadfrom); \ +} + +BUILD_VAR_TEST( test1, vector signed short, signed long long, signed short); +BUILD_VAR_TEST( test2, vector signed short, signed int, signed short); +BUILD_CST_TEST( test3, vector signed short, 12, signed short); + +BUILD_VAR_TEST( test4, vector unsigned short, signed long long, unsigned short); +BUILD_VAR_TEST( test5, vector unsigned short, signed int, unsigned short); +BUILD_CST_TEST( test6, vector unsigned short, 12, unsigned short); + +BUILD_VAR_TEST( test7, vector signed short, signed long long, vector signed short); +BUILD_VAR_TEST( test8, vector signed short, signed int, vector signed short); +BUILD_CST_TEST( test9, vector signed short, 12, vector signed short); + +BUILD_VAR_TEST( test10, vector unsigned short, signed long long, vector unsigned short); +BUILD_VAR_TEST( test11, vector unsigned short, signed int, vector unsigned short); +BUILD_CST_TEST( test12, vector unsigned short, 12, vector unsigned short); + +/* { dg-final { scan-assembler-times {\mlxvw4x\M|\mlxvd2x\M|\mlxvx\M|\mlvx\M} 12 } } */ |