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author | Uros Bizjak <uros@kss-loka.si> | 2006-10-21 21:27:02 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2006-10-21 21:27:02 +0200 |
commit | 962ef7fea28a33a5257ae4155e96edc357fb189b (patch) | |
tree | 79e5ae1aa05bb1a968f851fbdeb6a3799ed0e071 | |
parent | 509a77dc9c03756c172ebc00937e984d7a2d08c4 (diff) | |
download | gcc-962ef7fea28a33a5257ae4155e96edc357fb189b.zip gcc-962ef7fea28a33a5257ae4155e96edc357fb189b.tar.gz gcc-962ef7fea28a33a5257ae4155e96edc357fb189b.tar.bz2 |
re PR rtl-optimization/19398 (secondary reloads don't consider "m" alternatives)
PR target/19398
* config/i386/i386.md (fix_trunc?f?i_sse): Add peephole2
patterns to use memory input operand in x87->mem->XMM
reload sequences. Skip transformation for TARGET_K8.
From-SVN: r117935
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 21 |
2 files changed, 28 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 953dd25..8d33188 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2006-10-21 Uros Bizjak <uros@kss-loka.si> + PR target/19398 + * config/i386/i386.md (fix_trunc?f?i_sse): Add peephole2 + patterns to use memory input operand in x87->mem->XMM + reload sequences. Skip transformation for TARGET_K8. + +2006-10-21 Uros Bizjak <uros@kss-loka.si> + * config/i386/i386.md (extendsfdf2, extendsfxf2, extenddfxf2): Do not force operand1 to register if both operands are memory operands. (*extendsfdf2_mixed, *extendsfdf2_sse, *extendsfdf2_i387) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 91596dd..997f051 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4159,6 +4159,27 @@ (set_attr "mode" "DF") (set_attr "athlon_decode" "double,vector")]) +;; Shorten x87->SSE reload sequences of fix_trunc?f?i_sse patterns. +(define_peephole2 + [(set (match_operand:DF 0 "register_operand" "") + (match_operand:DF 1 "memory_operand" "")) + (set (match_operand:SSEMODEI24 2 "register_operand" "") + (fix:SSEMODEI24 (match_dup 0)))] + "!TARGET_K8 + && peep2_reg_dead_p (2, operands[0])" + [(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))] + "") + +(define_peephole2 + [(set (match_operand:SF 0 "register_operand" "") + (match_operand:SF 1 "memory_operand" "")) + (set (match_operand:SSEMODEI24 2 "register_operand" "") + (fix:SSEMODEI24 (match_dup 0)))] + "!TARGET_K8 + && peep2_reg_dead_p (2, operands[0])" + [(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))] + "") + ;; Avoid vector decoded forms of the instruction. (define_peephole2 [(match_scratch:DF 2 "Y") |