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authorDavid Edelsohn <edelsohn@gnu.org>2005-04-28 18:52:21 +0000
committerDavid Edelsohn <dje@gcc.gnu.org>2005-04-28 14:52:21 -0400
commit89955e36af58ebf62170d149d45ae3ad65a5d552 (patch)
tree0b33ad9154b4d2236c2744f65b96954649d70409
parent701558519078dc29af0d6853a6219cb38b40c02f (diff)
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re PR target/20813 (ICE in gen_reg_rtx for 3 spec tests)
PR target/20813 * config/rs6000/aix43.h (SUBSUBTARGET_SWITCHES, aix64): Add MASK_PPC_GFXOPT. * config/rs6000/aix51.h (SUBSUBTARGET_SWITCHES, aix64): Same. * config/rs6000/aix52.h (SUBSUBTARGET_SWITCHES, aix64): Same. * config/rs6000/sysv4.h (SUBTARGET_SWITCHES, 64): Same. From-SVN: r98934
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/rs6000/aix43.h5
-rw-r--r--gcc/config/rs6000/aix51.h5
-rw-r--r--gcc/config/rs6000/aix52.h5
-rw-r--r--gcc/config/rs6000/sysv4.h5
5 files changed, 21 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aa573eb..4ce81e0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2005-04-28 David Edelsohn <edelsohn@gnu.org>
+
+ PR target/20813
+ * config/rs6000/aix43.h (SUBSUBTARGET_SWITCHES, aix64): Add
+ MASK_PPC_GFXOPT.
+ * config/rs6000/aix51.h (SUBSUBTARGET_SWITCHES, aix64): Same.
+ * config/rs6000/aix52.h (SUBSUBTARGET_SWITCHES, aix64): Same.
+ * config/rs6000/sysv4.h (SUBTARGET_SWITCHES, 64): Same.
+
2005-04-28 Richard Earnshaw <richard.earnshaw@arm.com>
* arm.c (legitimize_pic_address): Fix sense of assertion test for
diff --git a/gcc/config/rs6000/aix43.h b/gcc/config/rs6000/aix43.h
index 12ac88b..6645287 100644
--- a/gcc/config/rs6000/aix43.h
+++ b/gcc/config/rs6000/aix43.h
@@ -23,8 +23,9 @@
/* AIX 4.3 and above support 64-bit executables. */
#undef SUBSUBTARGET_SWITCHES
-#define SUBSUBTARGET_SWITCHES \
- {"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC, \
+#define SUBSUBTARGET_SWITCHES \
+ {"aix64", MASK_64BIT | MASK_POWERPC64 \
+ | MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Compile for 32-bit pointers") }, \
diff --git a/gcc/config/rs6000/aix51.h b/gcc/config/rs6000/aix51.h
index 6b13196..7878927 100644
--- a/gcc/config/rs6000/aix51.h
+++ b/gcc/config/rs6000/aix51.h
@@ -22,8 +22,9 @@
/* AIX V5 and above support 64-bit executables. */
#undef SUBSUBTARGET_SWITCHES
-#define SUBSUBTARGET_SWITCHES \
- {"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC, \
+#define SUBSUBTARGET_SWITCHES \
+ {"aix64", MASK_64BIT | MASK_POWERPC64 \
+ | MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Compile for 32-bit pointers") }, \
diff --git a/gcc/config/rs6000/aix52.h b/gcc/config/rs6000/aix52.h
index 3c1a2ad..c038663 100644
--- a/gcc/config/rs6000/aix52.h
+++ b/gcc/config/rs6000/aix52.h
@@ -22,8 +22,9 @@
/* AIX V5 and above support 64-bit executables. */
#undef SUBSUBTARGET_SWITCHES
-#define SUBSUBTARGET_SWITCHES \
- {"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC, \
+#define SUBSUBTARGET_SWITCHES \
+ {"aix64", MASK_64BIT | MASK_POWERPC64 \
+ | MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Compile for 32-bit pointers") }, \
diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index 1d1f0a8..deb4870 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -132,7 +132,7 @@ extern const char *rs6000_tls_size_string; /* For -mtls-size= */
{ "bit-word", -MASK_NO_BITFIELD_WORD, "" }, \
{ "no-bit-word", MASK_NO_BITFIELD_WORD, \
N_("Do not allow bit-fields to cross word boundaries") }, \
- { "regnames", MASK_REGNAMES, \
+ { "regnames", MASK_REGNAMES, \
N_("Use alternate register names") }, \
{ "no-regnames", -MASK_REGNAMES, \
N_("Don't use alternate register names") }, \
@@ -150,7 +150,8 @@ extern const char *rs6000_tls_size_string; /* For -mtls-size= */
N_("Set the PPC_EMB bit in the ELF flags header") }, \
{ "windiss", 0, N_("Use the WindISS simulator") }, \
{ "shlib", 0, N_("no description yet") }, \
- { "64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC, \
+ { "64", MASK_64BIT | MASK_POWERPC64 \
+ | MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Generate 64-bit code") }, \
{ "32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Generate 32-bit code") }, \