i386.md (return, [...]): New patterns for emitting asm from prologue and epilogue RTL.

* i386.md (return, return_internal, prologue, prologue_set_got,
prologue_get_pc, epilogue, leave, pop): New patterns for emitting
asm from prologue and epilogue RTL.

From-SVN: r11990

1 files changed, 89 insertions, 7 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d585652..3d35f04 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5987,19 +5987,100 @@
 ;; This is only done if the function's epilogue is known to be simple.
 ;; See comments for simple_386_epilogue in i386.c.
 
-(define_insn "return"
+(define_expand "return"
   [(return)]
-  "simple_386_epilogue ()"
+  "ix86_can_use_return_insn_p ()"
+  "")
+
+(define_insn "return_internal"
+  [(return)]
+  "reload_completed"
+  "ret")
+
+(define_insn "nop"
+  [(const_int 0)]
+  ""
+  "nop")
+
+(define_expand "prologue"
+  [(const_int 1)]
+  ""
+  "
+{
+  ix86_expand_prologue ();
+  DONE;
+}")
+
+(define_insn "prologue_set_got"
+  [(set (match_operand:SI 0 "" "")
+    (plus:SI (match_dup 0)
+     (plus:SI (match_operand:SI 1 "symbolic_operand" "")
+      (minus:SI (pc) (match_operand 2 "" "")))))]
+  ""
   "*
 {
-  function_epilogue (asm_out_file, get_frame_size ());
+  char buffer[64];
+
+  if (TARGET_DEEP_BRANCH_PREDICTION) 
+    {
+      sprintf (buffer, \"addl %s,%%0\", XSTR (operands[1], 0));
+      output_asm_insn (buffer, operands);
+    }
+  else  
+    {
+      sprintf (buffer, \"addl %s+[.-.L%d],%%0\", XSTR (operands[1], 0), INTVAL (operands[2]));
+      output_asm_insn (buffer, operands);
+    }    
   RET;
 }")
 
-(define_insn "nop"
-  [(const_int 0)]
+(define_insn "prologue_get_pc"
+  [(set (match_operand:SI 0 "" "")
+    (plus:SI (pc) (match_operand 1 "" "")))]
   ""
-  "nop")
+  "*
+{
+  char buffer[64];
+
+  sprintf (buffer, \"call .L%d\", INTVAL (operands[1]));
+  output_asm_insn (buffer, operands);
+  if (! TARGET_DEEP_BRANCH_PREDICTION) 
+    {
+      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", INTVAL (operands[1]));
+    }    
+  RET;
+}")
+
+(define_expand "epilogue"
+  [(const_int 1)]
+  ""
+  "
+{
+  ix86_expand_epilogue ();
+  DONE;
+}")
+
+(define_insn "leave"
+  [(const_int 2)]
+  ""
+  "leave")
+
+(define_insn "pop"
+  [(set (match_operand:SI 0 "register_operand" "r")
+	(mem:SI (reg:SI 7)))
+   (set (reg:SI 7) (minus:SI (reg:SI 7) (const_int 4)))]
+  ""
+  "*
+{
+  rtx xops [2];
+
+    xops[0] = frame_pointer_rtx;
+    xops[1] = stack_pointer_rtx;
+    if (operands[0] == frame_pointer_rtx)
+       output_asm_insn (AS2 (mov%L0,%0,%1), xops);
+    output_asm_insn (AS1 (pop%L0,%P0), operands);
+    RET;
+}")
 
 (define_expand "movstrsi"
   [(parallel [(set (match_operand:BLK 0 "memory_operand" "")
@@ -6774,4 +6855,5 @@
 			       (match_operand:SI 2 "register_operand" "=&q")] 0))
    (clobber (match_dup 2))]
   "(TARGET_USE_Q_REG && optimize > 1)"
-  "* return output_strlen_unroll (operands);")
+  "* return output_strlen_unroll (operands);"
+)