diff options
| author | Ilya Tocar <ilya.tocar@intel.com> | 2015-05-05 15:43:13 +0000 |
|---|---|---|
| committer | Ilya Tocar <tocarip@gcc.gnu.org> | 2015-05-05 18:43:13 +0300 |
| commit | 460f31eeeb19cfe6e28120586f7a28ff53994723 (patch) | |
| tree | 03b59bc1a13e3c96c4f754a1c3017953517aa163 | |
| parent | d7edde11e0632bfe5403a123dddf75b82d06964b (diff) | |
| download | gcc-460f31eeeb19cfe6e28120586f7a28ff53994723.zip gcc-460f31eeeb19cfe6e28120586f7a28ff53994723.tar.gz gcc-460f31eeeb19cfe6e28120586f7a28ff53994723.tar.bz2 | |
re PR target/65915 (FAIL: gcc.target/i386/avx512f-vrndscalepd-2.c (internal compiler error))
PR target/65915
* config/i386/i386.md (vector convert to float spltiter): Check for
xmm16+, when splitting scalar float conversion.
* config/i386/sse.md (sse2_cvtsi2sd): Support EVEX version.
testsuite/ChangeLog:
PR target/65915
* gcc.target/i386/pr65915.c: New.
From-SVN: r222811
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 8 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 6 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr65915.c | 6 |
5 files changed, 27 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d8d673c..2fcfad9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-05-05 Ilya Tocar <ilya.tocar@intel.com> + + PR target/65915 + * config/i386/i386.md (vector convert to float spltiter): Check for + xmm16+, when splitting scalar float conversion. + * config/i386/sse.md (sse2_cvtsi2sd): Support EVEX version. + 2015-05-05 Nick Clifton <nickc@redhat.com> * config/msp430/msp430-opts.h (enum msp430_regions): New. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 0e941b6..fc320f6 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4897,7 +4897,9 @@ "TARGET_SSE2 && TARGET_SSE_MATH && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun) && reload_completed && SSE_REG_P (operands[0]) - && (MEM_P (operands[1]) || TARGET_INTER_UNIT_MOVES_TO_VEC)" + && (MEM_P (operands[1]) || TARGET_INTER_UNIT_MOVES_TO_VEC) + && (!EXT_REX_SSE_REG_P (operands[0]) + || TARGET_AVX512VL)" [(const_int 0)] { operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0], @@ -4921,7 +4923,9 @@ "TARGET_SSE2 && TARGET_SSE_MATH && TARGET_SSE_PARTIAL_REG_DEPENDENCY && optimize_function_for_speed_p (cfun) - && reload_completed && SSE_REG_P (operands[0])" + && reload_completed && SSE_REG_P (operands[0]) + && (!EXT_REX_SSE_REG_P (operands[0]) + || TARGET_AVX512VL)" [(const_int 0)] { const machine_mode vmode = <MODEF:ssevecmode>mode; diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 9b7009a..c61098d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4258,11 +4258,11 @@ (set_attr "mode" "TI")]) (define_insn "sse2_cvtsi2sd" - [(set (match_operand:V2DF 0 "register_operand" "=x,x,x") + [(set (match_operand:V2DF 0 "register_operand" "=x,x,v") (vec_merge:V2DF (vec_duplicate:V2DF (float:DF (match_operand:SI 2 "nonimmediate_operand" "r,m,rm"))) - (match_operand:V2DF 1 "register_operand" "0,0,x") + (match_operand:V2DF 1 "register_operand" "0,0,v") (const_int 1)))] "TARGET_SSE2" "@ @@ -4275,7 +4275,7 @@ (set_attr "amdfam10_decode" "vector,double,*") (set_attr "bdver1_decode" "double,direct,*") (set_attr "btver2_decode" "double,double,double") - (set_attr "prefix" "orig,orig,vex") + (set_attr "prefix" "orig,orig,maybe_evex") (set_attr "mode" "DF")]) (define_insn "sse2_cvtsi2sdq<round_name>" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6af4f3d..db07b66 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-05-05 Ilya Tocar <ilya.tocar@intel.com> + + PR target/65915 + * gcc.target/i386/pr65915.c: New. + 2015-05-05 Tom de Vries <tom@codesourcery.com> * gcc.dg/tree-ssa/stdarg-2.c: Xfail f15 scans which test for presence of diff --git a/gcc/testsuite/gcc.target/i386/pr65915.c b/gcc/testsuite/gcc.target/i386/pr65915.c new file mode 100644 index 0000000..990c5aa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr65915.c @@ -0,0 +1,6 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f -fpic -mcmodel=medium" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-require-effective-target lp64 } */ + +#include "avx512f-vrndscalepd-2.c" |