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| author | Dorit Naishlos <dorit@il.ibm.com> | 2004-02-05 18:07:39 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2004-02-05 13:07:39 -0500 |
| commit | 20a20bf0610a75c574bba3130cfb8d9a50e2c4df (patch) | |
| tree | 3f940c9cc4549184ebe8564b8a5746679b38ac9a | |
| parent | 6b37db3cae575604151c87caffdb558d5b41f8de (diff) | |
| download | gcc-20a20bf0610a75c574bba3130cfb8d9a50e2c4df.zip gcc-20a20bf0610a75c574bba3130cfb8d9a50e2c4df.tar.gz gcc-20a20bf0610a75c574bba3130cfb8d9a50e2c4df.tar.bz2 | |
altivec.md (*movv4si_internal): At least one operand must be altivec_register_operand.
2004-02-05 Dorit Naishlos <dorit@il.ibm.com>
* config/rs6000/altivec.md (*movv4si_internal): At least one
operand must be altivec_register_operand.
(*movv8hi_internal1): Likewise.
(*movv16qi_internal1): Likewise.
(*movv4sf_internal1): Likewise.
From-SVN: r77326
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 16 |
2 files changed, 20 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4419728..e9a5477 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-02-05 Dorit Naishlos <dorit@il.ibm.com> + + * config/rs6000/altivec.md (*movv4si_internal): At least one + operand must be altivec_register_operand. + (*movv8hi_internal1): Likewise. + (*movv16qi_internal1): Likewise. + (*movv4sf_internal1): Likewise. + 2004-02-05 David Edelsohn <edelsohn@gnu.org> * configure.ac (gcc_cv_as_powerpc_mfcrf): Correct test for mfcr. diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 3554d3f..7eb6323 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -93,7 +93,9 @@ (define_insn "*movv4si_internal" [(set (match_operand:V4SI 0 "nonimmediate_operand" "=m,v,v,o,r,r,v") (match_operand:V4SI 1 "input_operand" "v,m,v,r,o,r,W"))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC + && (altivec_register_operand (operands[0], V4SImode) + || altivec_register_operand (operands[1], V4SImode))" "* { switch (which_alternative) @@ -139,7 +141,9 @@ (define_insn "*movv8hi_internal1" [(set (match_operand:V8HI 0 "nonimmediate_operand" "=m,v,v,o,r,r,v") (match_operand:V8HI 1 "input_operand" "v,m,v,r,o,r,W"))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC + && (altivec_register_operand (operands[0], V8HImode) + || altivec_register_operand (operands[1], V8HImode))" "* { switch (which_alternative) @@ -185,7 +189,9 @@ (define_insn "*movv16qi_internal1" [(set (match_operand:V16QI 0 "nonimmediate_operand" "=m,v,v,o,r,r,v") (match_operand:V16QI 1 "input_operand" "v,m,v,r,o,r,W"))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC + && (altivec_register_operand (operands[0], V16QImode) + || altivec_register_operand (operands[1], V16QImode))" "* { switch (which_alternative) @@ -231,7 +237,9 @@ (define_insn "*movv4sf_internal1" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=m,v,v,o,r,r,v") (match_operand:V4SF 1 "input_operand" "v,m,v,r,o,r,W"))] - "TARGET_ALTIVEC" + "TARGET_ALTIVEC + && (altivec_register_operand (operands[0], V4SFmode) + || altivec_register_operand (operands[1], V4SFmode))" "* { switch (which_alternative) |