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| author | Richard Earnshaw <rearnsha@arm.com> | 2003-12-16 13:56:25 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2003-12-16 13:56:25 +0000 |
| commit | 1cc82d1389cc0e8bb23fc930a85187b0c747c9ff (patch) | |
| tree | 10e43eb0ac24bbaac66baa0f0dd38e74ace921c3 | |
| parent | 649a1a476c573b145a2af341f30755d2c4edf10b (diff) | |
| download | gcc-1cc82d1389cc0e8bb23fc930a85187b0c747c9ff.zip gcc-1cc82d1389cc0e8bb23fc930a85187b0c747c9ff.tar.gz gcc-1cc82d1389cc0e8bb23fc930a85187b0c747c9ff.tar.bz2 | |
* arm.md (addsi3_carryin_shift): Add missing register constraints.
From-SVN: r74694
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 8 |
2 files changed, 8 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d1cf3a4..6787173 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2003-12-16 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (addsi3_carryin_shift): Add missing register constraints. + 2003-12-16 Loren James Rittle <ljrittle@acm.org> * testsuite/g++.old-deja/g++.eh/badalloc1.C: Tweak to diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 980bb22..d45b071 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -792,13 +792,13 @@ ) (define_insn "*addsi3_carryin_shift" - [(set (match_operand:SI 0 "s_register_operand" "") + [(set (match_operand:SI 0 "s_register_operand" "=r") (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0)) (plus:SI (match_operator:SI 2 "shift_operator" - [(match_operand:SI 3 "s_register_operand" "") - (match_operand:SI 4 "reg_or_int_operand" "")]) - (match_operand:SI 1 "s_register_operand" ""))))] + [(match_operand:SI 3 "s_register_operand" "r") + (match_operand:SI 4 "reg_or_int_operand" "rM")]) + (match_operand:SI 1 "s_register_operand" "r"))))] "TARGET_ARM" "adc%?\\t%0, %1, %3%S2" [(set_attr "conds" "use")] |