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authorRichard Kenner <kenner@gcc.gnu.org>1992-02-17 19:22:18 -0500
committerRichard Kenner <kenner@gcc.gnu.org>1992-02-17 19:22:18 -0500
commit1c0751d9b8647d2d3b3bee252e65d1bf0c16bc36 (patch)
treec54af552143492006545f923bc68e16e4cd2daf9
parent7e860cf7f5babed7fd6431f1eeef694be2b4ff43 (diff)
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*** empty log message ***
From-SVN: r337
-rw-r--r--gcc/config/a29k/a29k.md26
1 files changed, 9 insertions, 17 deletions
diff --git a/gcc/config/a29k/a29k.md b/gcc/config/a29k/a29k.md
index 1d33790..6ce6e67 100644
--- a/gcc/config/a29k/a29k.md
+++ b/gcc/config/a29k/a29k.md
@@ -405,17 +405,13 @@
[(set (match_dup 4)
(ashiftrt:SI (match_operand:SI 1 "gen_reg_operand" "")
(const_int 31)))
- (set (reg:SI 180)
- (match_dup 4))
(parallel [(set (match_operand:SI 0 "gen_reg_operand" "")
(div:SI (match_dup 1)
(match_operand:SI 2 "gen_reg_operand" "")))
- (set (reg:SI 180)
+ (set (match_operand:SI 3 "gen_reg_operand" "")
(mod:SI (match_dup 1)
(match_dup 2)))
- (use (reg:SI 180))])
- (set (match_operand:SI 3 "gen_reg_operand" "")
- (reg:SI 180))]
+ (use (match_dup 4))])]
""
"
{
@@ -426,10 +422,10 @@
[(set (match_operand:SI 0 "gen_reg_operand" "=r")
(div:SI (match_operand:SI 1 "gen_reg_operand" "r")
(match_operand:SI 2 "gen_reg_operand" "r")))
- (set (reg:SI 180)
+ (set (match_operand:SI 3 "register_operand" "=q")
(mod:SI (match_dup 1)
(match_dup 2)))
- (use (reg:SI 180))]
+ (use (match_operand:SI 4 "register_operand" "3"))]
""
"divide %0,%1,%2")
@@ -437,17 +433,13 @@
;;
;; Similar to DIVIDE.
(define_expand "udivmodsi4"
- [(set (reg:SI 180)
- (const_int 0))
- (parallel [(set (match_operand:SI 0 "gen_reg_operand" "")
+ [(parallel [(set (match_operand:SI 0 "gen_reg_operand" "")
(udiv:SI (match_operand:SI 1 "gen_reg_operand" "")
(match_operand:SI 2 "gen_reg_operand" "")))
- (set (reg:SI 180)
+ (set (match_operand:SI 3 "gen_reg_operand" "")
(umod:SI (match_dup 1)
(match_dup 2)))
- (use (reg:SI 180))])
- (set (match_operand:SI 3 "gen_reg_operand" "")
- (reg:SI 180))]
+ (use (const_int 0))])]
""
"")
@@ -455,10 +447,10 @@
[(set (match_operand:SI 0 "gen_reg_operand" "=r")
(udiv:SI (match_operand:SI 1 "gen_reg_operand" "r")
(match_operand:SI 2 "gen_reg_operand" "r")))
- (set (reg:SI 180)
+ (set (match_operand:SI 3 "register_operand" "=q")
(umod:SI (match_dup 1)
(match_dup 2)))
- (use (reg:SI 180))]
+ (use (match_operand:SI 4 "const_int_operand" "3"))]
""
"dividu %0,%1,%2")