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| author | Andreas Krebbel <krebbel@linux.ibm.com> | 2019-12-16 08:03:28 +0000 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2019-12-16 08:03:28 +0000 |
| commit | 070fa48b0a4fbdc754e18962d586f41cc263dad7 (patch) | |
| tree | 9d4b10d04c6a5cd89453fa4adf9b8e560b6117db | |
| parent | 438fbf630358e113747c77b5be64fc3c1321d12a (diff) | |
| download | gcc-070fa48b0a4fbdc754e18962d586f41cc263dad7.zip gcc-070fa48b0a4fbdc754e18962d586f41cc263dad7.tar.gz gcc-070fa48b0a4fbdc754e18962d586f41cc263dad7.tar.bz2 | |
Fix PR92950: Wrong code emitted for movv1qi
The backend emits 16 bit memory loads for single element character
vector. As a result the character will not be right justified in the
GPR.
gcc/ChangeLog:
2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com>
PR target/92950
* config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy,
and lhrl with llc.
gcc/testsuite/ChangeLog:
2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com>
PR target/92950
* gcc.target/s390/vector/pr92950.c: New test.
From-SVN: r279410
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/s390/vector.md | 12 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/s390/vector/pr92950.c | 24 |
4 files changed, 40 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9b892fa..acf14a5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/92950 + * config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy, + and lhrl with llc. + 2019-12-14 Martin Sebor <msebor@redhat.com> * doc/extend.texi (attribute access): Correct typos. diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index d40e310..1e591ba 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -291,9 +291,9 @@ ; However, this would probably be slower. (define_insn "mov<mode>" - [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, S, Q, S, d, d,d,d,d,R,T") - (match_operand:V_8 1 "general_operand" " v,d,v,R,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,R,T,b,d,d"))] - "" + [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, S, Q, S, d, d,d,R,T") + (match_operand:V_8 1 "general_operand" " v,d,v,R,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,T,d,d"))] + "TARGET_VX" "@ vlr\t%v0,%v1 vlvgb\t%v0,%1,0 @@ -311,12 +311,10 @@ mviy\t%0,-1 lhi\t%0,0 lhi\t%0,-1 - lh\t%0,%1 - lhy\t%0,%1 - lhrl\t%0,%1 + llc\t%0,%1 stc\t%1,%0 stcy\t%1,%0" - [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RX,RXY,RIL,RX,RXY")]) + [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RXY,RX,RXY")]) (define_insn "mov<mode>" [(set (match_operand:V_16 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, Q, d, d,d,d,d,R,T,b") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 591f152..cc1a735 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/92950 + * gcc.target/s390/vector/pr92950.c: New test. + 2019-12-15 Andrew Pinski <apinski@marvell.com> * gcc.c-torture/compile/bitfield-1.c: New test. diff --git a/gcc/testsuite/gcc.target/s390/vector/pr92950.c b/gcc/testsuite/gcc.target/s390/vector/pr92950.c new file mode 100644 index 0000000..9c7ed12 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/pr92950.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */ + +struct a { + int b; + char c; +}; +struct a d = {1, 16}; +struct a *e = &d; + +int f = 0; + +int main() { + struct a g = {0, 0 }; + f = 0; + + for (; f <= 1; f++) { + g = d; + *e = g; + } + + if (d.c != 16) + __builtin_abort(); +} |