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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2015-06-10 16:51:49 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2015-06-10 16:51:49 +0000 |
| commit | 6a116f140f8921880516df7bcfb62fb6a3db033a (patch) | |
| tree | c636c3c7f0f97644fe66dee85da8565a5bdfc8b4 | |
| parent | 1a4cd2cd7e7266b07e28fe4d127cfd6e6bac0916 (diff) | |
| download | gcc-6a116f140f8921880516df7bcfb62fb6a3db033a.zip gcc-6a116f140f8921880516df7bcfb62fb6a3db033a.tar.gz gcc-6a116f140f8921880516df7bcfb62fb6a3db033a.tar.bz2 | |
re PR target/66474 (Document the use of %x in powerpc asm statements)
2015-06-10 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/66474
* doc/md.texi (Machine Constraints): Document that on the PowerPC
if you use a constraint that targets a VSX register, you must use
%x<n> in the template.
From-SVN: r224332
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/doc/md.texi | 21 |
2 files changed, 28 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7c002a4..e4dfe38 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-06-10 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/66474 + * doc/md.texi (Machine Constraints): Document that on the PowerPC + if you use a constraint that targets a VSX register, you must use + %x<n> in the template. + 2015-06-10 Max Filippov <jcmvbkbc@gmail.com> * config/xtensa/xtensa.h (TARGET_DEBUG): New definition. diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 30d7775..e991286 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3070,6 +3070,27 @@ Altivec vector register @item wa Any VSX register if the -mvsx option was used or NO_REGS. +When using any of the register constraints (@code{wa}, @code{wd}, +@code{wf}, @code{wg}, @code{wh}, @code{wi}, @code{wj}, @code{wk}, +@code{wl}, @code{wm}, @code{ws}, @code{wt}, @code{wu}, @code{wv}, +@code{ww}, or @code{wy}) that take VSX registers, you must use +@code{%x<n>} in the template so that the correct register is used. +Otherwise the register number output in the assembly file will be +incorrect if an Altivec register is an operand of a VSX instruction +that expects VSX register numbering. + +@smallexample +asm ("xvadddp %x0,%x1,%x2" : "=wa" (v1) : "wa" (v2), "wa" (v3)); +@end smallexample + +is correct, but: + +@smallexample +asm ("xvadddp %0,%1,%2" : "=wa" (v1) : "wa" (v2), "wa" (v3)); +@end smallexample + +is not correct. + @item wd VSX vector register to hold vector double data or NO_REGS. |