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| author | Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> | 2024-12-27 17:22:55 +0100 |
|---|---|---|
| committer | Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> | 2025-01-09 21:50:49 +0100 |
| commit | 794f6721e0ebd1b6cb6931285a033b9f1f30d650 (patch) | |
| tree | f31e655e1c073745fe457a2cd4b5c2e2ff77666b | |
| parent | c6b54302df470bf09801ad6785d5713ef23dcb38 (diff) | |
| download | gcc-794f6721e0ebd1b6cb6931285a033b9f1f30d650.zip gcc-794f6721e0ebd1b6cb6931285a033b9f1f30d650.tar.gz gcc-794f6721e0ebd1b6cb6931285a033b9f1f30d650.tar.bz2 | |
testsuite: arm: Verify asm per function for armv8_2-fp16-conv-1.c
This change will enforce that the expected instructions are generated
per function rather than allowing some other function to use the
expected instructions.
gcc/testsuite/ChangeLog:
* gcc.target/arm/armv8_2-fp16-conv-1.c: Convert
scan-assembler-times to check-function-bodies.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c | 101 |
1 files changed, 84 insertions, 17 deletions
diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c index c9639a5..517ffd7 100644 --- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c +++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c @@ -1,101 +1,168 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_ok } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -fno-schedule-insns -fno-schedule-insns2" } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ +/* { dg-final { check-function-bodies "**" "" } } */ /* Test ARMv8.2 FP16 conversions. */ #include <arm_fp16.h> +/* +** f16_to_f32: +** ... +** vcvtb\.f32\.f16 (s[0-9]+), \1 +** ... +*/ float f16_to_f32 (__fp16 a) { return (float)a; } +/* +** f16_to_pf32: +** ... +** vcvtb\.f32\.f16 (s[0-9]+), \1 +** ... +*/ float f16_to_pf32 (__fp16* a) { return (float)*a; } +/* +** f16_to_s16: +** ... +** vcvtb\.f32\.f16 (s[0-9]+), \1 +** vcvt\.s32\.f32 \1, \1 +** ... +*/ short f16_to_s16 (__fp16 a) { return (short)a; } +/* +** pf16_to_s16: +** ... +** vcvtb\.f32\.f16 (s[0-9]+), \1 +** vcvt\.s32\.f32 \1, \1 +** ... +*/ short pf16_to_s16 (__fp16* a) { return (short)*a; } -/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s[0-9]+} 4 } } */ - +/* +** f32_to_f16: +** ... +** vcvtb\.f16\.f32 (s[0-9]+), \1 +** ... +*/ __fp16 f32_to_f16 (float a) { return (__fp16)a; } +/* +** f32_to_pf16: +** ... +** vcvtb\.f16\.f32 (s[0-9]+), \1 +** ... +*/ void f32_to_pf16 (__fp16* x, float a) { *x = (__fp16)a; } +/* +** s16_to_f16: +** ... +** vcvt\.f32\.s32 (s[0-9]+), \1 +** vcvtb\.f16\.f32 \1, \1 +** ... +*/ __fp16 s16_to_f16 (short a) { return (__fp16)a; } +/* +** s16_to_pf16: +** ... +** vcvt\.f32\.s32 (s[0-9]+), \1 +** vcvtb\.f16\.f32 \1, \1 +** ... +*/ void s16_to_pf16 (__fp16* x, short a) { *x = (__fp16)a; } -/* { dg-final { scan-assembler-times {vcvtb\.f16\.f32\ts[0-9]+, s[0-9]+} 4 } } */ - +/* +** s16_to_f32: +** ... +** vcvt\.f32\.s32 (s[0-9]+), \1 +** ... +*/ float s16_to_f32 (short a) { return (float)a; } -/* { dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+, s[0-9]+} 3 } } */ - +/* +** f32_to_s16: +** ... +** vcvt\.s32\.f32 (s[0-9]+), \1 +** ... +*/ short f32_to_s16 (float a) { return (short)a; } -/* { dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+, s[0-9]+} 3 } } */ - +/* +** f32_to_u16: +** ... +** vcvt\.u32\.f32 (s[0-9]+), \1 +** ... +*/ unsigned short f32_to_u16 (float a) { return (unsigned short)a; } -/* { dg-final { scan-assembler-times {vcvt\.u32\.f32\ts[0-9]+, s[0-9]+} 1 } } */ - +/* +** f64_to_s16: +** ... +** vcvt\.s32\.f64 s[0-9]+, d[0-9]+ +** ... +*/ short f64_to_s16 (double a) { return (short)a; } -/* { dg-final { scan-assembler-times {vcvt\.s32\.f64\ts[0-9]+, d[0-9]+} 1 } } */ - +/* +** f64_to_s16: +** ... +** vcvt\.s32\.f64 s[0-9]+, d[0-9]+ +** ... +*/ unsigned short f64_to_u16 (double a) { return (unsigned short)a; } - -/* { dg-final { scan-assembler-times {vcvt\.s32\.f64\ts[0-9]+, d[0-9]+} 1 } } */ - - |