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authorAndre Vieira <andre.simoesdiasvieira@arm.com>2024-12-11 11:50:22 +0000
committerTamar Christina <tamar.christina@arm.com>2024-12-11 11:58:02 +0000
commit561ef7c8477ba58ea64de259af9c2d0870afd9d4 (patch)
treedf35879bc189ca77b8a23ae8ae99e5ec3074b027
parent9403b035befe3537c343f7430e321468c0f2c28b (diff)
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middle-end: Pass stmt_vec_info to TARGET_SIMD_CLONE_USABLE [PR96342]
This patch adds stmt_vec_info to TARGET_SIMD_CLONE_USABLE to make sure the target can reject a simd_clone based on the vector mode it is using. This is needed because for VLS SVE vectorization the vectorizer accepts Advanced SIMD simd clones when vectorizing using SVE types because the simdlens might match. This will cause type errors later on. Other targets do not currently need to use this argument. gcc/ChangeLog: PR target/96342 * target.def (TARGET_SIMD_CLONE_USABLE): Add argument. * tree-vect-stmts.cc (vectorizable_simd_clone_call): Pass stmt_info to call TARGET_SIMD_CLONE_USABLE. * config/aarch64/aarch64.cc (aarch64_simd_clone_usable): Add argument and use it to reject the use of SVE simd clones with Advanced SIMD modes. * config/gcn/gcn.cc (gcn_simd_clone_usable): Add unused argument. * config/i386/i386.cc (ix86_simd_clone_usable): Likewise. * doc/tm.texi: Regenerate Co-authored-by: Victor Do Nascimento <victor.donascimento@arm.com> Co-authored-by: Tamar Christina <tamar.christina@arm.com>
-rw-r--r--gcc/config/aarch64/aarch64.cc4
-rw-r--r--gcc/config/gcn/gcn.cc3
-rw-r--r--gcc/config/i386/i386.cc2
-rw-r--r--gcc/doc/tm.texi8
-rw-r--r--gcc/target.def8
-rw-r--r--gcc/tree-vect-stmts.cc9
6 files changed, 21 insertions, 13 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 4d1b3cc..77a2a6b 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -29490,12 +29490,12 @@ aarch64_simd_clone_adjust (struct cgraph_node *node)
/* Implement TARGET_SIMD_CLONE_USABLE. */
static int
-aarch64_simd_clone_usable (struct cgraph_node *node)
+aarch64_simd_clone_usable (struct cgraph_node *node, machine_mode vector_mode)
{
switch (node->simdclone->vecsize_mangle)
{
case 'n':
- if (!TARGET_SIMD)
+ if (!TARGET_SIMD || aarch64_sve_mode_p (vector_mode))
return -1;
return 0;
default:
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index d017f22..634171a 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -5653,7 +5653,8 @@ gcn_simd_clone_adjust (struct cgraph_node *ARG_UNUSED (node))
/* Implement TARGET_SIMD_CLONE_USABLE. */
static int
-gcn_simd_clone_usable (struct cgraph_node *ARG_UNUSED (node))
+gcn_simd_clone_usable (struct cgraph_node *ARG_UNUSED (node),
+ machine_mode ARG_UNUSED (vector_mode))
{
/* We don't need to do anything here because
gcn_simd_clone_compute_vecsize_and_simdlen currently only returns one
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 62f758b..ca763e1 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -25721,7 +25721,7 @@ ix86_simd_clone_compute_vecsize_and_simdlen (struct cgraph_node *node,
slightly less desirable, etc.). */
static int
-ix86_simd_clone_usable (struct cgraph_node *node)
+ix86_simd_clone_usable (struct cgraph_node *node, machine_mode)
{
switch (node->simdclone->vecsize_mangle)
{
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 7e8e02e..d7170f4 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6531,11 +6531,11 @@ This hook should add implicit @code{attribute(target("..."))} attribute
to SIMD clone @var{node} if needed.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SIMD_CLONE_USABLE (struct cgraph_node *@var{})
+@deftypefn {Target Hook} int TARGET_SIMD_CLONE_USABLE (struct cgraph_node *@var{}, @var{machine_mode})
This hook should return -1 if SIMD clone @var{node} shouldn't be used
-in vectorized loops in current function, or non-negative number if it is
-usable. In that case, the smaller the number is, the more desirable it is
-to use it.
+in vectorized loops in current function with @var{vector_mode}, or
+non-negative number if it is usable. In that case, the smaller the number
+is, the more desirable it is to use it.
@end deftypefn
@deftypefn {Target Hook} int TARGET_SIMT_VF (void)
diff --git a/gcc/target.def b/gcc/target.def
index 5ee33bf..8cf29c5 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1645,10 +1645,10 @@ void, (struct cgraph_node *), NULL)
DEFHOOK
(usable,
"This hook should return -1 if SIMD clone @var{node} shouldn't be used\n\
-in vectorized loops in current function, or non-negative number if it is\n\
-usable. In that case, the smaller the number is, the more desirable it is\n\
-to use it.",
-int, (struct cgraph_node *), NULL)
+in vectorized loops in current function with @var{vector_mode}, or\n\
+non-negative number if it is usable. In that case, the smaller the number\n\
+is, the more desirable it is to use it.",
+int, (struct cgraph_node *, machine_mode), NULL)
HOOK_VECTOR_END (simd_clone)
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 4759c27..497a313 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -4297,7 +4297,14 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
this_badness += floor_log2 (num_calls) * 4096;
if (n->simdclone->inbranch)
this_badness += 8192;
- int target_badness = targetm.simd_clone.usable (n);
+
+ /* If STMT_VINFO_VECTYPE has not been set yet pass the general vector
+ mode, which for targets that use it will determine what ISA we can
+ vectorize this code with. */
+ machine_mode vector_mode = vinfo->vector_mode;
+ if (vectype)
+ vector_mode = TYPE_MODE (vectype);
+ int target_badness = targetm.simd_clone.usable (n, vector_mode);
if (target_badness < 0)
continue;
this_badness += target_badness * 512;