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| author | Claudiu Zissulescu <claziss@gmail.com> | 2024-09-23 15:49:36 +0300 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@gmail.com> | 2024-09-23 16:55:19 +0300 |
| commit | ffd861c808f307c865659b556dd5a8c922bd6a51 (patch) | |
| tree | 08590b3e420907a4d8095a84bb4bfbbe50562ed7 | |
| parent | a030fcad4f9f490a08db0a4cad4c22635a0585c1 (diff) | |
| download | gcc-ffd861c808f307c865659b556dd5a8c922bd6a51.zip gcc-ffd861c808f307c865659b556dd5a8c922bd6a51.tar.gz gcc-ffd861c808f307c865659b556dd5a8c922bd6a51.tar.bz2 | |
arc: Remove mlra option [PR113954]
The target dependent mlra option was designed to be able to quickly
switch between LRA and reload. The reload register allocator step is
scheduled for retirement, thus, remove the functionality of mlra,
keeping it for backward compatibility.
PR target/113954
gcc/ChangeLog:
* config/arc/arc.cc (TARGET_LRA_P): Always return true.
(arc_lra_p): Remove.
* config/arc/arc.h (TARGET_LRA): Remove.
* config/arc/arc.opt (mlra): Change it to do nothing.
* doc/invoke.texi (mlra): Update option description.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
| -rw-r--r-- | gcc/config/arc/arc.cc | 10 | ||||
| -rw-r--r-- | gcc/config/arc/arc.h | 4 | ||||
| -rw-r--r-- | gcc/config/arc/arc.opt | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 4 |
4 files changed, 4 insertions, 18 deletions
diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc index c800226..a225ade 100644 --- a/gcc/config/arc/arc.cc +++ b/gcc/config/arc/arc.cc @@ -721,7 +721,7 @@ static rtx arc_legitimize_address_0 (rtx, rtx, machine_mode mode); arc_no_speculation_in_delay_slots_p #undef TARGET_LRA_P -#define TARGET_LRA_P arc_lra_p +#define TARGET_LRA_P hook_bool_void_true #define TARGET_REGISTER_PRIORITY arc_register_priority /* Stores with scaled offsets have different displacement ranges. */ #define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P hook_bool_void_true @@ -10156,14 +10156,6 @@ arc_eh_uses (int regno) return false; } -/* Return true if we use LRA instead of reload pass. */ - -bool -arc_lra_p (void) -{ - return arc_lra_flag; -} - /* ??? Should we define TARGET_REGISTER_PRIORITY? We might perfer to use q registers, because some insn are shorter with them. OTOH we already have separate alternatives for this purpose, and other diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index 0a1ecb7..4cadef7 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -1660,8 +1660,4 @@ enum /* The default option for BI/BIH instructions. */ #define DEFAULT_BRANCH_INDEX 0 -#ifndef TARGET_LRA -#define TARGET_LRA arc_lra_p() -#endif - #endif /* GCC_ARC_H */ diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index 5abb297..7b93183 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -401,8 +401,8 @@ Pass -marclinux_prof option through to linker. ;; lra is still unproven for ARC, so allow to fall back to reload with -mno-lra. mlra -Target Var(arc_lra_flag) Init(1) Save -Use LRA instead of reload. +Target Ignore +Does nothing. Preserved for backward compatibility. mlra-priority-none Target RejectNegative Var(arc_lra_priority_tag, ARC_LRA_PRIORITY_NONE) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 032adff..7e4f0ca 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -22716,9 +22716,7 @@ the case. @opindex mlra @item -mlra -Enable Local Register Allocation. This is still experimental for ARC, -so by default the compiler uses standard reload -(i.e.@: @option{-mno-lra}). +Does nothing. Preserved for backward compatibility. @opindex mlra-priority-none @item -mlra-priority-none |